Area and power efficient MAC unit

Swettha, S.; Rashmi, S.; Reddy, N Surya; Hemalatha, R.

doi:10.1109/spaces.2018.8316346

Cited by 5 publications

(2 citation statements)

References 4 publications

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“…Several attempts have been [10]- [11] made to optimize the accumulator and multiplication unit to provide complete system requirement of filter design with appropriate hardware units. In existing works, methodologies invented for RNS computation are broadly categorized into two types-LUT-based models and conventional binary modules.…”

Section: Methodsmentioning

confidence: 99%

Low power residue number system using lookup table decomposition and finite state machine based post computation

Balaji

Nimmagadda²

2022

IJEECS

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In this paper, memory optimization and architectural level modifications are introduced for realizing the low power <span lang="EN-US">residue number system (RNS) with improved flexibility for electroencephalograph (EEG) signal classification. The proposed RNS framework is intended to maximize the reconfigurability of RNS for high-performance finite impulse response (FIR) filter design. By replacing the existing power-hungry RAM-based reverse conversion model with a highly decomposed lookup table (LUT) model which can produce the results without using any post accumulation process. The reverse conversion block is modified with an appropriate functional unit to accommodate FIR convolution results. The proposed approach is established to develop and execute pre-calculated inverters for various module sets. Therefore, the proposed LUT-decomposition with RNS multiplication-based post-accumulation technology provides a high-performance FIR filter architecture that allows different frequency response configuration elements. Experimental results shows the superior performance of decomposing LUT-based direct reverse conversion over other existing reverse conversion techniques adopted for energy-efficient RNS FIR implementations. When compared with the conventional RNS FIR design with the proposed FSM based decomposed RNS FIR, the logic elements (LEs) were reduced by 4.57%, the frequency component is increased by 31.79%, number of LUTs is reduced by 42.85%, and the power dissipation was reduced by 13.83%.</span>

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Section: Methodsmentioning

confidence: 99%

Low power residue number system using lookup table decomposition and finite state machine based post computation

Balaji

Nimmagadda²

2022

IJEECS

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“…Several attempts have been [9][10] made to optimize the accumulator and multiplication unit to provide complete system requirement of filter design with appropriate hardware units. In existing works, methodologies invented for RNS computationare broadly categorized into two types namely, LUT-based models and conventional binary modules.…”

Section: Related Workmentioning

confidence: 99%

Low Power RNS System Using Lut Decomposition and FSM Based Post Computation for Eeg Signal Classification

2024

Preprint

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In this paper, memory optimization and architectural level modifications are introduced for low power realization of the Residue Number System(RNS) with improved flexibility for EEG signal classification. The proposed RNS framework is intended to maximize the reconfigurability of RNS for high-performance FIR filter design. By replacing the existing power-hungry RAM-based reverse conversion model with a highly decomposed LUT model which can produce the results without using any post accumulation process. The proposed RNS design makes use of inherent parallelism among residue channels and resources available of FPGA devices, the reverse conversion block is modified with an appropriate functional unit to accommodate FIR convolution results. The proposed approach is formulated to design pre-computed reverse converters for different moduli sets and implemented based on FPGA as target devices. As a result, the proposed LUT-based direct computation-based post accumulation technique for RNS-based multiplication offers high-performance FIR filter architecture which can also allow configuring the elements for different frequency responses. Experimental results show the superior performance of decomposing LUT-based direct reverse conversion over all other existing reverse conversion techniques adopted for energy-efficient RNS FIR implementations.

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Performance Analysis of Multipliers Using Modified Gate Diffused Input Technology

Kumar

Kariyappa²,

Shashank³

et al. 2020

IETE Journal of Research

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Area and power efficient MAC unit

Cited by 5 publications

References 4 publications

Low power residue number system using lookup table decomposition and finite state machine based post computation

Low power residue number system using lookup table decomposition and finite state machine based post computation

Low Power RNS System Using Lut Decomposition and FSM Based Post Computation for Eeg Signal Classification

Performance Analysis of Multipliers Using Modified Gate Diffused Input Technology

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