Architectural requirements of parallel scientific applications with explicit communication

Cypher, Robert; Ho, A.; Konstantinidou, S.; Messina, Paul

doi:10.1145/165123.165124

Cited by 81 publications

(16 citation statements)

References 12 publications

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“…Irregular finite element applications like EXFLOW and Quake have an average total communication volume similar to that of the regular applications studied earlier by Cypher et al [5], but they transfer more messages having a smaller average size than most of those regular applications. Perhaps our most troublesome conclusion is that because block transfers between PEs tend to be small even for large irregular applications, block latency costs cannot be amortized by large messages, and communication latency will need to be a central focus of future efforts to engineer effective communication networks and software.…”

supporting

confidence: 54%

“…stantinidou, and Messina [5], who characterize eight regular and irregular scientific applications in terms of memory, processing, communication, and I/O requirements, and build scalability models for three of the simpler regular applications. However, our approach is different in that our goal is depth rather than breadth.…”

mentioning

confidence: 99%

“…For example, the EXFLOW application from Cypher et al [5] is a 3D unstructured finite element program that simulates a fluid dynamics problem on 512 PEs. Interestingly, EXFLOW has nearly identical computational properties as a similarly sized Quake application (sf2/128, which resolves a wave with a two-second period on 128 PEs).…”

mentioning

confidence: 99%

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Architectural implications of a family of irregular applications

O’Hallaron

Shewchuk²,

Groß³

Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture

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Irregular applications based on sparse matrices are at the core of many important scientific computations. Since the importance of such applications is likely to increase in the future, high-performance parallel and distributed systems must provide adequate support for such applications. We characterize a family of irregular scientific applications and derive the demands they will place on the communication systems of future parallel systems. Running time of these applications is dominated by repeated sparse matrix vector product (SMVP) operations. Using simple performance models of the SMVP, we investigate requirements for bisection bandwidth, sustained bandwidth on each processing element (PE), burst bandwidth during block transfers, and block latencies for PEs under different assumptions about sustained computational throughput. Our model indicates that block latencies are likely to be the most problematic engineering challenge for future communication networks.

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confidence: 54%

mentioning

confidence: 99%

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Architectural implications of a family of irregular applications

O’Hallaron

Shewchuk²,

Groß³

Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture

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“…Distributed systems can increase application performance by significant amount and the incremental enhancement of a network based concurrent computing environment is usually straight forward because of the availability of high bandwidth networks [2,3,7]. Attempts have also been made towards parallel solutions on distributed memory MIMD machines; see [6,9,17,28].…”

Section: Introductionmentioning

confidence: 99%

Parallel Implementation of 2-D Telegraphic Equation on MPI/PVM Cluster

Ewedafe

Shariffudin

2010

Int J Parallel Prog

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In this paper, a parallel implementation of the Iterative Alternating Direction Explicit method by D'Yakonov (IADE-DY) to solve 2-D telegraphic problem on a distributed system using Message Passing Interface (MPI) and Parallel Virtue Machine (PVM) are presented. The parallelization of the program is implemented by a domain decomposition strategy. A Single Program Multiple Data (SPMD) model is employed for the implementation. The implementation is discussed in relation to means of the parallel performance strategies and analysis. The model enhances overlap communication and computation to avoid unnecessary synchronization, hence, the method yields significant speedup. The level of speedup observed from tables as the mesh increases are in the range of 5-10%. Improvement has been achieved by numbers of tables and figures in our experiment. We present some analyses that are helpful for speedup and efficiency. It is concluded that the efficiency is strongly dependent on the grid size, block numbers and the number of processors for both MPI and PVM. Different strategies to improve the computational efficiency are proposed.

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“…Similarly, wormhole switching achieves low latency without requiring packet buffers, but virtual cut-through and packet switching may achieve better throughput at high loads. Packet size also impacts network performance, since inter-node communication often consists of large data transfers, coupled with small request and acknowledgement packets [2]. The network can accommodate this mixture by using wormhole switching for long packel,s, while allowing short packets to use virtual cut-through switching to reduce network contention [5].…”

Section: Introductionmentioning

confidence: 99%

A programmable routing controller for flexible communications in point-to-point networks

Daniel

Rexford

Dolter

et al.

Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors

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Modern parallel and distributed applications have a wide range of communication characteristics and performance requirements. This paper presents the Programmable Routing Controller (PRC), a custom ASIC that supports flexible network policies t o accommodate diverse application requirements. B y dedicating a small programmable processor t o each incoming link, the PRC can implement wormhole, virtual cut-through, and packet switching, as well as hybrid schemes, under a variety of unicast and multicast routing algorithms. The PRC can support several applications or trafic types simultaneously b y implementing multiple routing-switching microcode routines.

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Architectural requirements of parallel scientific applications with explicit communication

Cited by 81 publications

References 12 publications

Architectural implications of a family of irregular applications

Architectural implications of a family of irregular applications

Parallel Implementation of 2-D Telegraphic Equation on MPI/PVM Cluster

A programmable routing controller for flexible communications in point-to-point networks

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