Approximate computing: An emerging paradigm for energy-efficient design

Han, Jie; Orshansky, Michael

doi:10.1109/ets.2013.6569370

Cited by 838 publications

(330 citation statements)

References 48 publications

Supporting

Mentioning

299

Contrasting

Unclassified

Order By: Relevance

“…The requirement for an exact computation is relaxed due to several factors: (1) the limited perceptual capability of humans (e.g., audio, video, graphics due to the ability of the human brain to "fill in" missing information and filter out high-frequency patterns), (2) a golden result is difficult to define or does not exist (e.g., web search, data analytics), (3) users are willing to accept approximate but good-enough results, and (4) noisy inputs [18]. The class of methods and techniques referred to as approximate computing usually relax the requirement of exact equivalence between the specification and implementation of a computing system [11].…”

Section: Approximate Computing Methods For Dsp Systemsmentioning

confidence: 99%

“…The reader is referred to [18][19][20], for detailed surveys on approximate, stochastic, and probabilistic computing. The approaches for the design of approximate DSP systems can generally be grouped in three categories: (i) transistor level, (ii) gate level, and (iii) algorithmic level.…”

Section: Approximate Computing Methods For Dsp Systemsmentioning

confidence: 99%

“…This relaxation allows trading the accuracy of numerical outputs for reductions in area, delay, or power dissipation of the design [12]. Research activities on approximate computing range from a transistor level to an algorithmic level [13][14][15][16][17][18][19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A novel method for the approximation of multiplierless constant matrix vector multiplication

Aksoy¹,

Flores

Monteiro

2016

J Embedded Systems

View full text Add to dashboard Cite

Since human beings have limited perceptual abilities, in many digital signal processing (DSP) applications, e.g., image and video processing, the outputs do not need to be computed accurately. Instead, their computation can be approximated so that the area, delay, and/or power dissipation of the design can be reduced. This paper presents an approximation algorithm, called AURA, for the multiplierless design of the constant matrix vector multiplication (CMVM) which is a ubiquitous operation in DSP systems. AURA aims to tune the constants such that the resulting matrix leads to a CMVM design which requires the fewest adders/subtractors, satisfying the given error constraints. This paper also introduces its modified version, called AURA-DC, which can reduce the delay of the CMVM operation with a small increase in the number of adders/subtractors. Experimental results show that the proposed algorithms yield significant reductions in the number of adders/subtractors with respect to the original realizations without violating the error constraints, and consequently lead to CMVM designs with less area, delay, and power dissipation. Moreover, they can generate alternative CMVM designs under different error constraints, enabling a designer to choose the one that fits best in an application.

show abstract

Section: Approximate Computing Methods For Dsp Systemsmentioning

confidence: 99%

Section: Approximate Computing Methods For Dsp Systemsmentioning

confidence: 99%

See 1 more Smart Citation

A novel method for the approximation of multiplierless constant matrix vector multiplication

Aksoy¹,

Flores

Monteiro

2016

J Embedded Systems

View full text Add to dashboard Cite

show abstract

“…Some of the operations used in this area are intrinsically error-tolerant, such as multimedia, recognition, and data mining [10] [6] [21] and [8]. For these kinds of applications, approximate computing is severed as an important part to reduce the design area, power consumption, and computation delay in the digital systems.…”

Section: Related Workmentioning

confidence: 99%

Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System

Zhang¹,

Yang²,

Wu³

et al. 2018

IJCA

View full text Add to dashboard Cite

This paper presents a novel hierarchical synthesis for approximating field-programmable gate array (FPGA) based adders and multipliers. Our proposed work implements the multiplier design with the following contributions: 1) providing four types of single-bit approximate adders to cover a wide range of energy-quality tradeoffs, 2) presenting many approximations of multipliers by employing the single-bit adders, 3) substituting corresponding bits of the approximate multiplier by considering the quality constrains of the results. The novel hierarchical synthesis of the approach has been integrated into our prior project, an FPGA-IoTmesh system in the field of fog computing for hardware acceleration. Combining the merits of reconfigurability of FPGAs and long-distance connection of CSRmesh technology, this work creates a diverse range of applications such as approximate designs at the network edge, as well as showing a demo for Internet-of-Things (IoT) connections covering an entire building.

show abstract

“…At a constant clock rate and hence performance, a power reduction comes from the reduced activity of the gated sequential and associated combinational cells. More recently, similar scaling of precision has been considered in the broader context of approximate computing (AC) [22]. Approximate computing generally exploits tradeoffs between computational complexity and energy or performance at various levels ranging from algorithms to transistors.…”

Section: Introductionmentioning

confidence: 99%

Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems

Lee

Gerstlauer

2015

IFIP Advances in Information and Communication Technology

View full text Add to dashboard Cite

Approximate computing: An emerging paradigm for energy-efficient design

Cited by 838 publications

References 48 publications

A novel method for the approximation of multiplierless constant matrix vector multiplication

A novel method for the approximation of multiplierless constant matrix vector multiplication

Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System

Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems

Contact Info

Product

Resources

About