Approaches for reducing power consumption of the high-resolution pipelined analog-to-digital converters

Sidun, Aleksandr V.; Piatak, Ivan

doi:10.1109/eiconrus.2018.8317074

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Cited by 9 publications

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A design of flash analog-to-digital converter in 180 nm CMOS process with high effective number of bits

Budanov

Коротков

2019

J. Phys.: Conf. Ser.

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High speed flash analog-to-digital converters are used in modern high-performance telecommunication systems. Furthermore, high effective resolution of such converter should be provided. The paper presents a design of a flash analog-to-digital converter with high effective number of bits. As an example, the 8-bit flash ADC in 180 nm CMOS has been implemented. Simulation confirms efficiency of proposed design. The effective resolution of presented design achieves 6.9 bits.

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