Approach to Integration of a Synthesis Tool and PDK for Commercial EDA

This article presents a genetic algorithm‐based technique for microwave integrated distributed amplifier synthesis. To speed‐up synthesis, only linear characteristics are used in the goal function. The technique uses MMIC foundry process design kit models providing manufacturing‐ready schematics to be found. The models from the process design kit are presented as S‐parameters again to enhance algorithm performance. The technique allows searching among most of the existing schematics of the microwave distributed amplifier but is not limited to typical topologies. The section number is theoretically unlimited and makes it possible to find principally new circuit topology. The synthesis shortens and simplifies the distributed amplifier design time. Experimental validation of the technique is carried out by synthesizing the broadband driver stage for the 20–30 GHz buffer amplifier. The technique produces several amplifier topologies meeting the requirements. The most appropriate circuit was manufactured using a commercial 0.25 μm GaAs pHEMT process. The manufactured buffer amplifier demonstrates a gain of 10 dB and 20 dBm output power at a 1 dB compression point.

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“…To automate this step 50ohm PDK Bridge software was used. 46 Therefore, the synthesis algorithm uses its model library.…”

Section: Simulation Algorithmmentioning

confidence: 99%

“…Therefore, S ‐parameters of the elements can be easily generated in the EDA tool without the need for determining an equivalent circuit of each element and extracting its parameters. To automate this step 50ohm PDK Bridge software was used 46 . Therefore, the synthesis algorithm uses its model library.…”

Section: Integrated Microwave Da Synthesis Techniquementioning

confidence: 99%

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

Metel

Добуш

Kalentyev

et al. 2023

Int J Numerical Modelling

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“…The complete pseudocode for the function deal_port() is shown in Algorithm 3 below. graph[e [1]]. append(e[0]) 9: end for 10: # Depth-first search function for traversing a graph.…”

Section: Algorithm 1 Netlist File Reading Schemementioning

confidence: 99%

“…In the field of microelectronics, Process Design Kits (PDKs) serve as a starting point for integrated circuit design, acting as a bridge between design engineers and manufacturing companies [1]. During the chip design process, the foundry provides specific data and script files in the Electronic Design Automation (EDA) tool, as the PDK library used by the designer contains details about the semiconductor process.…”

Section: Introductionmentioning

confidence: 99%

From Netlist to Manufacturable Layout: An Auto-Layout Algorithm Optimized for Radio Frequency Integrated Circuits

et al. 2023

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Layout stitching is a repetitive and tedious task of the radio frequency integrated circuit (RFIC) design process. While academic research on layout splicing algorithms mainly focuses on analog and digital circuits, there is still a lack of well-developed algorithms for RFICs. An RFIC system usually has a symmetrical layout, such as transmitter and receiver components, low-noise amplifier (LNA), an SPDT switch, etc. This paper aims to address this gap by proposing an automated procedure for the layout of RFICs by relying on the basic device/PCell structure based on the interconnection among circuit topologies. This approach makes the in-series generation of layouts and automatic splicing based on circuit logic possible, resulting in superior stitching performance compared with related modules in Advanced Design System. To demonstrate the physical application possibilities, we implemented our algorithm on an LNA and a switch circuit.

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“…These parameters provide a framework for simulating the behavior of electronic circuits, allowing engineers and researchers to predict their performance under various operational conditions. However, obtaining these parameters from manufacturers is generally not straightforward [13]. Consequently, when these parameters are inaccessible, simulations that are based on scarce technological information lead to results that may fail to meet expectations.…”

Section: Introductionmentioning

confidence: 99%

Evaluation of a Simplified Modeling Approach for SEE Cross-Section Prediction: A Case Study of SEU on 6T SRAM Cells

Marques,

Wrobel,

Aguiar

et al. 2024

Electronics

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Electrical models play a crucial role in assessing the radiation sensitivity of devices. However, since they are usually not provided for end users, it is essential to have alternative modeling approaches to optimize circuit design before irradiation tests, and to support the understanding of post-irradiation data. This work proposes a novel simplified methodology to evaluate the single-event effects (SEEs) cross-section. To validate the proposed approach, we consider the 6T SRAM cell a case study in four technological nodes. The modeling considers layout features and the doping profile, presenting ways to estimate unknown parameters. The accuracy and limitations are determined by comparing our simulations with actual experimental data. The results demonstrated a strong correlation with irradiation data, without requiring any fitting of the simulation results or access to process design kit (PDK) data. This proves that our approach is a reliable method for calculating the single-event upset (SEU) cross-section for heavy-ion irradiation.

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Approach to Integration of a Synthesis Tool and PDK for Commercial EDA

Cited by 4 publications

References 10 publications

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

From Netlist to Manufacturable Layout: An Auto-Layout Algorithm Optimized for Radio Frequency Integrated Circuits

Evaluation of a Simplified Modeling Approach for SEE Cross-Section Prediction: A Case Study of SEU on 6T SRAM Cells

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