Application of Native Inhomogeneities to Increase Compactness of Vertical Field-Effect Transistors

Abstract

In this paper we consider an possibility to decrease dimensions of vertical field-effect transistors. Framework the considered approach it is occurs decreasing of depth of the transistors and increasing their density in integrated circuits.

On Optimization of Manufacturing of Field-Effect Heterotransistors Frame-work a Single-Stage Multi-path Operational Amplifier, To Increase their Density

“…3a for diffusion doping of materials and Fig. 3b for ion doping of materials) [15][16][17][18][19][20]. Framework the criteria one shall approximate real distributions of concentration of dopant by ideal step-wise distribution ψ (x,y,z).…”

On Approach to Optimize Manufacturing of a Transistors with Two Sources to Decrease their Dimensions

“…3a for diffusion type of doping and 3b for ion type of doping). As optimal annealing time of dopant and/or radiation defects we determine compromise value of the required time time framework recently introduced criterion [15][16][17][18][19][20]. Based on the criterion we approximate real distribution of concentration of dopant by idealized step-wise function ψ (x, y,z).…”

On Approach to Increase Density of Field Effect Transistors in an Inverter Circuit

“…If the annealing time is large, the distribution of concentration of dopant is too homogenous. We optimize the annealing time based on a recently introduced approach [11][12][13][14][15][16]. By applying the criterion we approximate real distribution of concentration of dopant by a step-wise function (see Figs.…”

“…1). Based on recently formulated recommendations to decrease dimensions of single transistors (both bipolar and field-effect) [11][12][13][14][15][16] we formulate recommendations to increase density of field-effect transistors framework the considered circuits. We assume, that the considered circuits were manufactured framework the considered in Fig.1 heterostructure.…”