Application of Intermediate CMOS Layer-based Defected Ground Structure to Design a Dual-Band On-chip Antenna with Improved Gain

Abstract

In this paper, a novel CPW-fed dual-band on-chip antenna (OCA) by introducing a Crossed Bowtie shaped Defected Ground Structure (CBDGS) in one of the intermediate layers of the CMOS layout is proposed. In general, a CPW fed OCA has its ground plane on the same plane of antenna, however, introducing a DGS in one of the intermediate layer using Through Silicon Vias (TSVs) to obtain dual band characteristics of antenna as well as to improve its gain is performed in this work. A 10 dB operating band of 9 GHz (2.25 GHz - 11.75 GHz) is obtained by employing the meandered loop miniaturization technique on the antenna designed on top CMOS layer, while the introduction of DGS layer enforced a comparatively less stop band at the middle of the operating band and the resultant structure offered a dual-band resonance characteristic at 3.1 GHz and 10.4 GHz. Here, the intermediate DGS layer between the top-layered antenna and Silicon (Si) wafer reduces the substrate loss by preventing the coupling of the electromagnetic radiation with the substrate and enhances the antenna gain significantly at both the resonance frequencies respectively by +16.01 dB and +12.7 dB. A prototype of the proposed antenna structure is fabricated and the obtained simulated result is validated through experimental measurement.