Application and benefits of formal methods in software development

Plat, Nico; Katwijk, J. van; Toetenel, Hans

doi:10.1049/sej.1992.0034

Cited by 24 publications

(12 citation statements)

References 12 publications

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“…Nico Plat [3] took an example of the application of formal method VDM in DoD-STD-2167A model to answer the question how could formal methods be used in software development. He also made b comparison between formal methods and informal methods to show the shortage of informal methods and advantage of formal ones.…”

Section: Application Of Formal Methods In Software Development Classimentioning

confidence: 99%

A survey on formal methods using in software development

You¹,

Li²,

Xia³

2012

IET International Conference on Information Science and Control Engineering 2012 (ICISCE 2012)

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Formal methods have been well used in software development segments of requirement analysis, system design and realization, test and maintenance.In this paper, the research status, achievement and problems of formal methods are summarized. Some recent progress and applications of formal methods using in software development are reviewed. The limitations and further research directions are pointed. Research on formal methods can ensure the software system security and reliability by making strict and precise specifications, and verifying several system performances as well.

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Section: Application Of Formal Methods In Software Development Classimentioning

confidence: 99%

A survey on formal methods using in software development

You¹,

Li²,

Xia³

2012

IET International Conference on Information Science and Control Engineering 2012 (ICISCE 2012)

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“…However, in the last decades we have begun to see a more promising picture of formal methods because of the advent of formal notations (such as the Z notation [165]), the use of formal methods on industrial case studies [48] (which increases the confidence in using formal methods) and the commercial tools for supporting formal analysis. Plate et al [144] argue that the main benefit of using formal methods is that "formal notations can be unambiguously interpreted and provide extensive means to express abstraction. These notations can be used to formally verify characteristics of the design".…”

Section: Practices To Improve the Quality Of Modelsmentioning

confidence: 99%

Lightweight and static verification of UML executable models

Planas

Cabot

Gómez

2016

Computer Languages, Systems & Structures

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A la meva família, per acompanyar-me en aquest camí.A dissertation presented by Elena Planas Hortal in partial fulfillment of the requirements for the degree of Doctor per la Universitat Politècnica de Catalunya Barcelona, February 10, 2013 Agraïments Doing a PhD thesis is a lonely task that cannot be carried out alone. AnonymAquesta tesiés el resultat d'uns quants anys de feina, durant els quals he rebut el suport, tan professional com personal, de moltes persones. Aquests agraïments són per tots vosaltres.En primer lloc, vull donar les gràcies als meus directors de tesi, al Dr. Jordi Cabot i a la Dra. Cristina Gómez, per donar-me l'oportunitat de treballar i aprendre al seu costat. Al Jordi, moltes gràcies per aportar una visió clara i resolutiva dels problemes, pels seus consells precisos que sempre m'han resultat moltútils i per la seva disponibilitat des de qualsevol lloc del món. A la Cristina, moltes gràcies pel seu rigor científic i grau d'exigència, i també per la seva proximitat, dedicació i interès constant. A tots dos, moltes gràcies per la vostra orientació i suport que m'han permès arribar fins aquí.Moltíssimes gràcies a totes les persones que han col.laborat directament amb el desenvolupament d'aquesta tesi. Un agraïment molt especial al David Sánchez, per haver-me ajudat amb la implementació de la tesi, però sobretot pel seu entusiasme en tot moment. També a l'Esther Guerra i al Juan de Lara, per permetre'm ampliar la visió del meu propi treball aplicant-lo a d'altres camps.També vull donar les gràcies als examinadors d'aquesta tesi: el Dr. Antoni Olivé i a la Dra. Ruth Raventós, de la Universitat Politècnica de Catalunya (UPC), al Dr. Robert Clarisó, de la Universitat Oberta de Catalunya (UOC), al Dr. Vicente Pelechano, de la Universitat Politècnica de València (UPV) i al Dr. Manuel Wimmer, de la Vienna University of Technology (TUWien) per acceptar formar part del tribunal. També, als revisors externs que van llegir una versió prèvia d'aquesta tesi i em van fer arribar els seus suggeriments per millorar-la.A tots els meus companys del Grup de Modelització Conceptual (GMC): Gràcies pels vostres comentaris i consells al llarg del desenvolupament d'aquesta tesi. Un agraïment especial a l'Antonio Villegas i al David Aguilera, per proporcionar-me la plantilla d'aquesta tesi i resoldre els meus dubtes de L A T E X amb una rapidesa increïble.A tots els companys i amics dels estudis d'Informàtica, Multimèdia i Telecomunicació de la UOC. Al Josep Prieto, per donar-me totes les facilitats per poder acabar aquesta tesi. Al Santi Caballé i a l'Elena Rodríguez, per haver-se fet càrrec de les meves assignatures mentre jo he estat redactant aquest document. Als meus companys de despatx, el David Bañeres i el Jordi Conesa, pels moments compartits al llarg de tots aquests anys. A l'Àgata Lapedriza, l'Àngels Rius, i tants d'altres, per formar part del meu dia dia.A very special acknowledgment (in english) to all my dutch collegues from the Software Engineering and Technology group (SET) at the Eindhoven Unive...

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“…Data reification involves the transition from abstract to concrete data types, and a justification of this transition. Choosing a more concrete data model implies a redefinition of all operations and functions on the original model in terms of the new model, a process called operation modeling [17].…”

Section: Vdm++mentioning

confidence: 99%

A Framework for Inheritance Testing from VDM++ Specifications

Nadeem

Lyu

2006

2006 12th Pacific Rim International Symposium on Dependable Computing (PRDC'06)

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The benefits offered by the use of formal methods are not limited to avoidance of specification errors and elimination of ambiguities only -a formal specification also provides a sound basis for generating test suites. Inheritance is a powerful mechanism in object-oriented paradigm by which a subclass inherits data and functionality of a super class. Testing of inheritance relationships is crucial in object-oriented testing, as an inheritance error may lead to subtle bugs such as due to overridden functionality. In this paper, we introduce a technique to generate test cases for inheritance testing, using a VDM++ formal specification. The proposed technique is based on the flattening of a VDM++ specification class, and then generating operation sequences from the trace structure specified in the VDM++ specification. The input space for each operation is partitioned, and a test model is constructed from the operation sequences and the input partitions. Test paths are generated from the test model, which cover the different operation sequences as well as the partitions. We also define various coverage criteria for test path generation.

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Application and benefits of formal methods in software development

Cited by 24 publications

References 12 publications

A survey on formal methods using in software development

A survey on formal methods using in software development

Lightweight and static verification of UML executable models

A Framework for Inheritance Testing from VDM++ Specifications

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