Apollo: Transferable Architecture Exploration

Jones, Albin; Yazdanbakhsh, Amir; Akin, Berkin; Angermueller, Christof; Laudon, James; Swersky, Kevin; Hashemi, Milad; Narayanaswami, Ravi; Chatterjee, Sat; Zhou, Yanqi

doi:10.48550/arxiv.2102.01723

Cited by 4 publications

(12 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…ML for Architecture search: Apollo [35] is a recent work from Google, targeting sample efficient searching through the accelerator design space using reinforcement learning. Gamma [17] and ConfuciuX [16] are similar ML based architecture mapping and design space configuration search methods which use genetic algorithm and reinforcement learning (RL) respectively.…”

Section: Related Workmentioning

confidence: 99%

AIRCHITECT: Learning Custom Architecture Design and Mapping Space

Samajdar,

Joseph,

Denton

et al. 2021

Preprint

View full text Add to dashboard Cite

Design space exploration is an important but costly step involved in the design/deployment of custom architectures to squeeze out maximum possible performance and energy efficiency. Conventionally, optimizations require iterative sampling of the design space using simulation or heuristic tools. In this paper we investigate the possibility of learning the optimization task using machine learning (ML) and hence using the learnt model to predict optimal parameters for the design and mapping space of custom architectures, bypassing any exploration step. We use three case studies involving the optimal array design, SRAM buffer sizing, mapping, and schedule determination for systolicarray-based custom architecture design and mapping space. We perform systematic design-aware and statistical analysis of the optimization space for our case studies and highlight the patterns in the design space. We formulate the architecture design and mapping as a ML problem that allows us to leverage existing ML models for training and inference. We design and train a custom network architecture called AIRCHITECT, which is capable of learning the architecture design space with as high as 94.3% test accuracy and predicting optimal configurations which achieve on average (GeoMean) of 99.9% the best possible performance on a test dataset with 10 5 GEMM workloads.

show abstract

Section: Related Workmentioning

confidence: 99%

AIRCHITECT: Learning Custom Architecture Design and Mapping Space

Samajdar,

Joseph,

Denton

et al. 2021

Preprint

View full text Add to dashboard Cite

show abstract

“…estimating chip area usage), most infeasible points correspond to failures during compilation or hardware simulation. These infeasible points are generally not straightforward to formulate into the optimization problem and requires simulation [54,45,63].…”

Section: Problem Statement Training Data and Evaluation Protocolmentioning

confidence: 99%

“…The death of Moore's Law [12] and its spiraling effect on the semiconductor industry have driven the growth of specialized hardware accelerators. These specialized accelerators are tailored to specific applications [63,48,42,54]. To design specialized accelerators, designers first spend considerable amounts of time developing simulators that closely model the real accelerator performance, and then optimize the accelerator using the simulator.…”

Section: Introductionmentioning

confidence: 99%

“…While such simulators can automate accelerator design, this requires a large number of simulator queries for each new design, both in terms of simulation time and compute requirements, and this cost increases with the size of the design space [64,54,26]. Moreover, most of the accelerators in the design space are typically infeasible [26,63] because of build errors in silicon or compilation/mapping failures. When the target applications change or a new application is added, the complete simulation-driven procedure is generally repeated.…”

Section: Introductionmentioning

confidence: 99%

“…Such a data-driven approach provides three key benefits: (1) it significantly shortens the recurring cost of running large-scale simulation sweeps, (2) it alleviates the need to explicitly bake in domain knowledge or search space pruning, and (3) it enables data re-use by empowering the designer to optimize accelerators for new unseen applications, by the virtue of effective generalization. While data-driven approaches have shown promising results in biology [15,6,58], using offline optimization methods to design accelerators has been challenging primarily due to the abundance of infeasible design points [63,26] (see Figures 3 and 11).…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Data-Driven Offline Optimization For Architecting Hardware Accelerators

Kumar¹,

Yazdanbakhsh²,

Hashemi³

et al. 2021

Preprint

Self Cite

View full text Add to dashboard Cite

Industry has gradually moved towards application-specific hardware accelerators in order to attain higher efficiency. While such a paradigm shift is already starting to show promising results, designers need to spend considerable manual effort and perform a large number of time-consuming simulations to find accelerators that can accelerate multiple target applications while obeying design constraints. Moreover, such a "simulation-driven" approach must be re-run from scratch every time the set of target applications or design constraints change. An alternative paradigm is to use a "data-driven", offline approach that utilizes logged simulation data, to architect hardware accelerators, without needing any form of simulations. Such an approach not only alleviates the need to run time-consuming simulation, but also enables data reuse and applies even when set of target applications changes. In this paper, we develop such a data-driven offline optimization method for designing hardware accelerators, dubbed PRIME, that enjoys all of these properties. Our approach learns a conservative, robust estimate of the desired cost function, utilizes infeasible points and optimizes the design against this estimate without any additional simulator queries during optimization. PRIME architects accelerators-tailored towards both single and multiple applications-improving performance upon state-of-theart simulation-driven methods by about 1.54× and 1.20×, while considerably reducing the required total simulation time by 93% and 99%, respectively. In addition, PRIME also architects effective accelerators for unseen applications in a zero-shot setting, outperforming simulation-based methods by 1.26×.

show abstract

ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism

Feng

Fan

et al. 2023

ACM Trans. Embed. Comput. Syst.

View full text Add to dashboard Cite

Customized accelerators for Convolutional Neural Networks (CNN) can achieve better energy efficiency than general computing platforms. However, the design of a high-performance accelerator should take into account a variety of parameters and physical constraints. The increasing parameters and tighter constraints gradually complicate the design space, which poses new challenges to the capacity and efficiency of design space exploration methods. In this paper, we provide a novel design space exploration method named ACDSE for optimizing the design process of CNN accelerators. ACDSE implements the adaptive compression mechanism to dynamically adjust the search range and prune low-value design points according to the exploration states. As a result, it can focus on valuable subspace while also improving exploration capacity and efficiency. Additionally, we implement ACDSE to address the problem of CNN accelerator latency optimization. The experiment indicates that, compared to former DSE methods, ACDSE can reduce latency and increase efficiency by 1.39x–5.07x and 2.07x–43.87x, respectively, under the most stringent constraint conditions, demonstrating its superior adaptability to the complicated design space.

show abstract

Apollo: Transferable Architecture Exploration

Cited by 4 publications

References 27 publications

AIRCHITECT: Learning Custom Architecture Design and Mapping Space

AIRCHITECT: Learning Custom Architecture Design and Mapping Space

Data-Driven Offline Optimization For Architecting Hardware Accelerators

ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism

Contact Info

Product

Resources

About