Anomalies of ohmic contacts on heteroepitaxial GaAs layers on Si after rapid thermal annealing

Abstract

This paper reports on resistance and capacity measurements of ohmic contacts which were deposited on heteroepitaxially grown, Si-doped GaAs layers on Si substrates. It is observed that the process of rapid thermal annealing (RTA) considerably affects the ohmic properties of subsequently deposited contacts. With rising annealing temperature, the electrical resistivity in the GaAs layer and thus, the contact resistance increased essentially. Although the chemical concentration profile of Si dopants is not changed by RTA, the number of electrically active carriers is lowered. Photoluminescence measurements con&m that Si donors on Ga sites perform a site exchange to As vacancies, thereby forming Si acceptors. The extent of this exchange process is considerably enhanced by the presence of a high dislocation density in the heteroepitaxial GaAs films. 0 1995 American Institute of Physics.

Gain and Dark Current Studies on Planar Photodetectors Made on Annealed GaAs-on-Si

“…In those devices, the Schottky devices possess no gain but the ohmic devices do. This difference may have two origins: (i) It has been shown that the contact resistance of ohmic contacts to GaAs/Si is much larger if RTA has been applied to GaAs [6]. This inhibits photoconductive gain but reduces dark current; (ii) The expected non-ideality of the Schottky contacts on the dislocated GaAs makes the Cr/Au contact more injecting, causing better responsiveness but also a higher dark current as we found (Fig.…”

Observation of the Coulomb Blockade at 77 K in a Lattice-Mismatched GaAs/Si Heterojunction

“…This process is tremendously enhanced near the interface by the high density of lattice defects in heteroepitaxial layer. As a result the p-n junction is shifted to GaAs side with respect to the Si/GaAs interface [3].The lattice constant of GaAs is about 4% larger than that of Si. This mismatch leads to the formation of a twodimensional network of misfit dislocations at (745) …”

“…This process is tremendously enhanced near the interface by the high density of lattice defects in heteroepitaxial layer. As a result the p-n junction is shifted to GaAs side with respect to the Si/GaAs interface [3].…”