2020
DOI: 10.1016/j.rinp.2020.103679
|View full text |Cite
|
Sign up to set email alerts
|

Analytical study of Metal-Insulator-Semiconductor contacts for both p- and n-InGaN

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2021
2021
2024
2024

Publication Types

Select...
4
1

Relationship

1
4

Authors

Journals

citations
Cited by 6 publications
(3 citation statements)
references
References 32 publications
0
3
0
Order By: Relevance
“…The total charge for the device which is fetched to Poisson's solver is given by 𝜌 π‘‡π‘œπ‘‘π‘Žπ‘™ = 𝜌 πΉπ‘Ÿπ‘’π‘’ + 𝜌 𝐹𝑖π‘₯𝑒𝑑 (4) Here,𝜌 𝑠 (𝑧) is the fixed charge (𝜌 𝐹𝑖π‘₯𝑒𝑑 ) which is accumulated at the interface due to surface states and forms the barrier at the metal-X-ene interface. The 𝜌 𝑠 (𝑧) is given by [25]- [27]…”
Section: Theorymentioning
confidence: 99%
See 1 more Smart Citation
“…The total charge for the device which is fetched to Poisson's solver is given by 𝜌 π‘‡π‘œπ‘‘π‘Žπ‘™ = 𝜌 πΉπ‘Ÿπ‘’π‘’ + 𝜌 𝐹𝑖π‘₯𝑒𝑑 (4) Here,𝜌 𝑠 (𝑧) is the fixed charge (𝜌 𝐹𝑖π‘₯𝑒𝑑 ) which is accumulated at the interface due to surface states and forms the barrier at the metal-X-ene interface. The 𝜌 𝑠 (𝑧) is given by [25]- [27]…”
Section: Theorymentioning
confidence: 99%
“…The decay of the surface charge states inside the X-enes has been determined by the physical properties of the X-enes. The decay parameter πœ†is the cumulative effect of the several factors such as electron-electron scattering and the electron-phonon scattering due to the surface states [25]. In order to understand the impact of decay parameter on the transport of the X-ene based devices, the decay parameter πœ† is considered to be analogous to the tunneling width of the barrier.…”
Section: Theorymentioning
confidence: 99%
“…Though Si has obtained steeper subthreshold swings [13], [14], it will be more challenging to obtain enough high on currents in Si-based devices due to the indirect and wide bandgap [10], [11], [15]- [17]. To reduce the effective tunneling barrier height and ratify high on-current, III-V (e.g., Ge, SiGe, InAs, InGaAs) material-based heterostructure TFET devices have been established and show excellent performance [18]- [20]. For instance, a high-K dielectric double gate tunnel FET (DGTFET) was proposed by K. Boucart [10], which offers a significant ON current of 0.23 mA at 1.8 V gate voltage with an incredibly low OFF current value of less than 1 f A.…”
Section: Introductionmentioning
confidence: 99%