Analytical Parasitic Resistance and Capacitance Models for Nanosheet Field-Effect Transistors

Suk, JunHa; Kim, Yohan; Do, Jeongho; Kim, G.C.; Baek, Sanghoon; Kye, Jongwook; Kim, Soyoung

doi:10.1109/ted.2023.3270398

Cited by 5 publications

(5 citation statements)

References 15 publications

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“…4) The proposed model shows better accurcay in comparison to [25], [26]. The worst case accuracy is ≈ 99% for propsed model, while it is ≈ 97% and ≈ 96% for [25], and [26] respectively. The detailed comparisons are demonstrated in tabular form in Table 5.…”

Section: B Comparison With Reported Workmentioning

confidence: 85%

“…3) As just two fitting parameters are employed in the proposed model compared to five in [25], the complexity of the recommended model is less than that of the [25]. 4) The proposed model shows better accurcay in comparison to [25], [26]. The worst case accuracy is ≈ 99% for propsed model, while it is ≈ 97% and ≈ 96% for [25], and [26] respectively.…”

Section: B Comparison With Reported Workmentioning

confidence: 96%

“…2) The proposed model showed good comparison considering specific geometry parameters of GAAFET with respect to industry standard BSIM-CMG. 3) As just two fitting parameters are employed in the proposed model compared to five in [25], the complexity of the recommended model is less than that of the [25]. 4) The proposed model shows better accurcay in comparison to [25], [26].…”

Section: B Comparison With Reported Workmentioning

confidence: 97%

“…In comparison to recently published related works, the proposed compact model for parasitic capacitance is more sophisticated due to the following aspects: 1) The proposed model includes corner capacitance which is crucial to practical GAAFET, as opposed to [25], [26], where explicit physicsbased model for corner rounding capacitance was not included.…”

Section: B Comparison With Reported Workmentioning

confidence: 99%

“…Furthermore, they made no mention of the accuracy of their model in comparison to the industry standard BSIM-CMG model. Recently J. Suk et.al [25] and S. Sharma et.al [26] have presented updated models for parasitic capacitances in GAAFETs. However, both of these works do not include a physical model to account for the corner rounding and related capacitance components.…”

Section: Introductionmentioning

confidence: 99%

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Compact Modeling of Parasitic Capacitances in GAAFETs for Advanced Technology Nodes

Sarker,

Kumar,

Ehteshamuddin

et al. 2023

IEEE J. Electron Devices Soc.

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In this work, a compact model for parasitic capacitances is proposed for Gate-All-Around silicon nanosheet FET (GAAFET). For 3 stack GAAFET, all possible parasitic capacitance components are included according to the electric field lines and geometric structure of this device. Conformal mapping and Schwarz Christoffel transforms as well as elliptic integral methods are used to model the perpendicular capacitance as well as coplanar plate capacitance. We have also used fundamental capacitance modeling to calculate the corner capacitance. The validity of the proposed model is calibrated and verified with the 3D TCAD simulations. Evaluation is also done of how different device physical parameters affect the total parasitic capacitance. The results demonstrate that the proposed model is capable of accurately estimating the parasitic capacitance of the GAAFET device. The proposed model is also implemented in the BSIM-CMG framework to verify the model's accuracy and application of it in the circuit simulation.

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