Analytical modeling of threshold voltage and subthreshold swing in Si/Ge heterojunction FinFET

Das, Rajashree; Baishya, Srimanta

doi:10.1007/s00339-019-2969-y

Cited by 4 publications

(3 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Between the germanium channel and silicon source, the heterojunction was created. When compared to its homojunction equivalent silicon structure, the TG heterojunction FinFET are found to have excellent agreement with TCAD results [25]. In order to examine the impact of the FinFET sidewall inclination angle on V , T an analytical model was proposed by T. E. Ayoob Khan et al The study measured V T and inherent trap changes for different fin angles and surface charge densities.…”

Section: Structural Dimensions Ie W mentioning

confidence: 79%

Impact of fin width on nano scale tri-gate FinFET including the quantum mechanical effect

et al. 2023

View full text Add to dashboard Cite

An inversion charge-based threshold voltage model is proposed for 10 nm channel length Tri-gate (TG) FinFET. The variation threshold voltage has been studied with respect to fin width W f i n for different fin height H f i n and channel length L . The effect of width quantization has been explained with the help of the quantum mechanical effect (QME). A precise comparison of threshold voltage in terms of classical mechanics and quantum mechanics depicts the presence of width quantization in short channel device. The improvement of the short channel effects (SCEs), like subthreshold swing (SS), drain-induced barrier lowering (DIBL) and threshold voltage roll off have been studied. The impact of channel length to fin width ratio on DIBL and S S has been examined. The improvement of the SCEs at the same oxide thickness has been observed for high-k dielectric material. The potential and effect of hafnium oxide (HfO2) have been discussed and validated using technology computer-aided design (TCAD) simulation.

show abstract

Section: Structural Dimensions Ie W mentioning

confidence: 79%

Impact of fin width on nano scale tri-gate FinFET including the quantum mechanical effect

et al. 2023

View full text Add to dashboard Cite

show abstract

“…The switching effectivity of low power digital device can be evaluated by the characteristics of drain current at the subthreshold region of device, which is commonly known as subthreshold swing. The analytical model of subthreshold swing is developed by solving the Poisson's equation in the channel region at cutline position x = T f /2, y = H fin [38].…”

Section: Mathematical Modelmentioning

confidence: 99%

Mathematical Modeling and Performance Evaluation of 3D Ferroelectric Negative Capacitance FinFET

Alam

Uddin

Alam

et al. 2022

Modelling and Simulation in Engineering

View full text Add to dashboard Cite

Ferroelectric negative capacitance materials have now been proposed for lowering electronics energy dissipation beyond basic limitations. In this paper, we presented the analysis on the performance of negative capacitance (NC) FinFET in comparison with conventional gate dielectrics by using a separation of variables approach, which is an optimal quasi-3D mathematical model. The result has been signified steeper surface potential (ψ), lower threshold voltage (Vth), 1.2 mA of on-state current (Ion), and enhanced immunity of negative capacitance FinFET against short channel effects (SCE’s) like 35.3 mV/V of drain-induced barrier lowering (DIBL), 60 mV/dec of subthreshold swing (SS) along with smallest off state current (Ioff) among another conventional gate dielectric. Hence, NC FinFET can be a potential candidate for low power and high-performance device.

show abstract

“…1) But it is important to note that these performance improvements for conventional planar MOSFETs come at the cost of short channel effects (SCEs). To alleviate these issues, FinFET [2][3][4][5][6] and fully-depleted SOI (FD SOI) [7][8][9] technologies have emerged, which can suppress SCEs and enable further downscaling of the transistors. It is noteworthy that SOI MOSFETs have many attractive advantages as compared to bulk silicon technology, such as lower power dissipation, higher speed, and extended scalability.…”

Section: Introductionmentioning

confidence: 99%

Two-dimensional analytical model for a non-lightly doped drain SOI MOSFET

Xu,

Cui,

et al. 2024

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

A two-dimensional (2D) analytical model considering the effects of the gate oxide region, channel region, and buried oxide region for a non-lightly doped drain (LDD) SOI MOSFET is proposed. The top and bottom surface potential distributions have been derived on the basis of solving 2D Poisson’s equation and using an evanescent mode analysis. The potential distribution, threshold voltage, and threshold voltage roll-off have been verified by Silvaco ATLAS simulated results for the proposed device with different device parameters. The model agrees well with the simulation results under the above-mentioned conditions. Therefore, the analytical model provides the basic designing guidance for non-LDD SOI MOSFETs.

show abstract

Analytical modeling of threshold voltage and subthreshold swing in Si/Ge heterojunction FinFET

Cited by 4 publications

References 24 publications

Impact of fin width on nano scale tri-gate FinFET including the quantum mechanical effect

Impact of fin width on nano scale tri-gate FinFET including the quantum mechanical effect

Mathematical Modeling and Performance Evaluation of 3D Ferroelectric Negative Capacitance FinFET

Two-dimensional analytical model for a non-lightly doped drain SOI MOSFET

Contact Info

Product

Resources

About