Analytical considerations on power loss in a three-arm-type uninterruptible power supply

Hirao, N.; Satonaga, T.; Uematsu, Taro; Kohama, Takeshi; Ninomiya, Tamotsu; Shoyama, Masahito

doi:10.1109/pesc.1998.703439

“…1 (b). This type of system is highly cost-effective and acceptable due to its total power conversion efficiency improvement, volume and weight reduction [6][7][8][9]. However, some disadvantages are found as: unbalance between the upper and lower side DC link capacitors, AC-DC and DC-AC converters switches are 978-1-4244-5287-3/10/$26.00 ©2010 IEEE exposed to total DC link voltage [10].…”

Section: Introductionmentioning

confidence: 99%

Three-phase three-level boost rectifier based on three-state switching cells for UPS applications using FPGA

Camara

¹

,

Praça

²

,

Cruz

³

et al. 2010

2010 IEEE Energy Conversion Congress and Exposition

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This paper presents a three-phase three-level boost for Uninterruptible Power Supply (UPS) applications using FPGA. Its main features are: high power factor, reduced conduction losses, weight and volume, simple control strategy based on One-cycle Control (OCC), and connection between input and output enabling the use of inverter and bypass. A theoretical analysis, simulation results and preliminaries experimental results from a 9kW development stage lab model are presented.. Index Terms-FPGA, three-level boost, three-phase, threestate switching cell, UPS.

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“…1 (b). This type of system is highly cost-effective and acceptable due to its total power conversion efficiency improvement, volume and weight reduction [6][7][8][9]. However, some disadvantages are found as: unbalance between the upper and lower side DC link capacitors, AC-DC and DC-AC converters switches are exposed to total DC link voltage [10].…”

Section: Introductionmentioning

confidence: 99%

Three-phase three-level boost for UPS applications using FPGA

Camara

¹

,

Praça

²

,

Cruz

³

et al. 2010

2010 9th IEEE/IAS International Conference on Industry Applications - INDUSCON 2010

0

View full text Add to dashboard Cite

This paper presents a three-phase three-level boost for Uninterruptible Power Supply (UPS) applications using FPGA. Its main features are: high power factor, reduced conduction losses, weight and volume, simple control strategy based on One-cycle Control (OCC), and connection between input and output enabling the use of inverter and bypass. A theoretical analysis, simulation results and preliminaries experimental results from a 9kW development stage lab model are presented.

show abstract

“…2 shows a modified single-phase three-level rectifier and a half-bridge inverter scheme reported in [15] and [16], with a battery set and a static-switch arrangement that overcome the drawbacks related previously. The main advantages of this configuration include the possibility to correct the dc-link bus capacitor-voltage imbalance, to reduce both the step-up ratio of 0278-0046/$25.00 © 2008 IEEE the boost converter and the number of battery units necessary for the battery-powered operation mode, and to use fewer active switches compared with the topologies presented in [7], [8], [9], [10], [11], and [12].…”

Section: Introductionmentioning

confidence: 99%

A Nonisolated Single-Phase UPS Topology With 110-V/220-V Input–Output Voltage Ratings

Branco

¹

,

Cruz

²

,

Torrico-Bascope

³

et al. 2008

IEEE Trans. Ind. Electron.

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A circuit configuration of a single-phase nonisolated online uninterruptible power supply (UPS) with 110-V/220-V input-output voltage ratings is proposed, allowing the bypass operation without a transformer even if the input voltage is different from the output voltage. The converter consists of an ac-dc/dc-dc three-level boost converter combined with a double half-bridge inverter. In this type of configuration size, cost and efficiency are improved due to the reduced number of switches and batteries, and also, no low-frequency isolation transformer is required to realize bypass operation because of the common neutral connection. Both stages of the proposed circuit operate at high frequency by using a passive nondissipative snubber circuit in the boost converter and insulated-gate bipolar-transistor switches in the double half-bridge inverter, with low conduction losses, low tail current, and low switching losses. Principle of operation and experimental results for a 2.6-kVA prototype are presented to demonstrate the UPS performance.

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Analytical considerations on power loss in a three-arm-type uninterruptible power supply

Cited by 26 publications

References 3 publications

Three-phase three-level boost rectifier based on three-state switching cells for UPS applications using FPGA

Three-phase three-level boost rectifier based on three-state switching cells for UPS applications using FPGA

Three-phase three-level boost for UPS applications using FPGA

A Nonisolated Single-Phase UPS Topology With 110-V/220-V Input–Output Voltage Ratings

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