Analytical analysis of nanoscale fully depleted Double-Gate MOSFETs including the hot-carrier degradation effects

Study on the Analytical Model of non-planar MOSFET

“…The straight channel potential model is derived from Poisson equation 1using generic approach as noted in several references, e.g. [10,[18][19][20][21]. Moreover, the presence of corner region in the bottom is arguably difficult to solve using two-dimensional Poisson equation in Cartesian system.…”

Investigation on the interface trap characteristics in a p-channel GaN MOSFET through temperature-dependent subthreshold slope analysis

“…Recently, there have been a few demonstrations of GaN-based p-channel devices on this platform [7][8][9][10]; however, very few reports are available on the specific properties of trap states at the gate dielectric/p-GaN interface. In FETs the high-density interface traps and hot carries would cause lots of adverse effects to the analog and digital properties such as mobility and transconductance degradation, leakage current increase, threshold voltage instability, and low reliability etc [11][12][13].…”

ANFIS-based approach to study the subthreshold swing behavior for nanoscale DG MOSFETs including the interface trap effect

“…These traps at or near the semiconductor/gate dielectric in interface can cause the degradation of device parameters such as transconductance or threshold voltage and may lead to dielectric breakdown [4,5]. For this reason, the carrier trapping in gate oxides is considered as the principal cause of instability for short channel MOSFETs and becomes one of the most important concerns for next generation MOS integrated circuit development [6].…”