Analysis on Contact Resistance and Effective Channel Length of Thin Film Transistors Using Composition-Modified In–Ga–Zn-O Active Channels Prepared with Atomic Layer Deposition and Various Electrode Materials

Lee, Dong-Hee; Kwon, Young-Ha; Seong, Nak-Jin; Choi, Kyu-Jeong; Kim, Gyungtae; Yoon, Sung-Min

doi:10.1021/acsaelm.2c01342

Cited by 6 publications

(3 citation statements)

References 56 publications

(86 reference statements)

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“…Amorphous oxide semiconductors (AOSs) with extremely low off-currents originating from their electronic structure − have attracted considerable interest for applications in the storage chip industry, enabling the development of capacitorless dynamic random-access memory (DRAM) architecture and high-density DRAM technologies. − In contrast to thin-film transistors (TFTs) for flat panel displays, storage chips employ vertically stacked complex device architectures to achieve higher device density, − posing challenges in electrode processing, and increasing the importance of contact issues between AOSs and electrodes. − Process-derived poor contacts and a substantial Schottky barrier resulting from the intrinsic energy level mismatch between the work function of the electrode metal and the electron affinity of AOSs eventually lead to excessively high contact resistance ( R C ), thereby degrading field-effect mobility and power consumption. Recently, many works have proposed methods to solve high contact resistance between AOSs and metal electrodes, which may be categorized into several main strategies: additional deposition of a highly conductive oxide interlayer, − oxidation of the metal contact surface resulting in the formation of high concentration oxygen vacancies on the AOS contact surface via high-temperature annealing, − penetration of metal ions into the AOS layer, , and surface treatment with plasma. − These methods, which involve high-energy or multistep processes, offer effective solutions for the high contact resistance of the exposed upper surface of oxide semiconductors, as shown in Figure a, but are almost impossible to apply to buried contact or deep vertical interfaces within nanoscale complex structures.…”

Section: Introductionmentioning

confidence: 99%

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Shi,

Tsuji,

Cho

et al. 2024

ACS Nano

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Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures offer promising alternative materials for next-generation high-density memory devices. The complex vertical stacking process of memory devices significantly increases the probability of encountering internal contact issues. Conventional surface treatment methods developed for planar devices necessitate efficient approaches to eliminate contact issues at deep internal interfaces in the nanoscale complex structures of AOS devices. In this work, we report the pioneering use of palladium thin film as a high-efficiency active hydrogen transfer pathway from the outside to the internal contact interface via low-temperature postannealing in the H 2 atmosphere, and the formation of highly conductive metallic interlayer effectively solves the contact issues at the deeply buried interfaces in devices. The application of this method reduced the contact resistance of Pd electrodes/amorphous indium−gallium−zinc oxide (a-IGZO) thin-film by 2 orders of magnitude, and thereby the mobility of thin-film transistor was increased from 3.2 cm 2 V −1 s −1 to nearly 20 cm 2 V −1 s −1 , preserving an excellent bias stress stability. This technology has wide applicability for the solution of contact resistance issues in oxide semiconductor devices with complex architectures.

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Section: Introductionmentioning

confidence: 99%

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Shi,

Tsuji,

Cho

et al. 2024

ACS Nano

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“…In addition, by using the electrical characteristics of a-IGZO that change according to the oxygen vacancy ratio, the performance of the device was improved by adjusting the carrier concentration of the channel to form an Ohmic contact, and there was also an experiment in which the performance of the device was improved by inserting an interlayer of high carrier concentration between the channel and the electrode. Lee et al reported the impact of contact resistance on the performance of IGZO TFTs fabricated by ALD with modulated semiconductor composition and two types (ITO and Mo) of S/D electrodes. − …”

Section: Introductionmentioning

confidence: 99%

Enhancement of InGaZnO Thin-Film Transistors by Contact Barrier Modulation Using Oxygen Defects

Kim

Ahn

et al. 2023

ACS Appl. Electron. Mater.

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We have studied the effect of barrier-controlled electrodes on characteristics of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) using an interlayer with modulated oxygen defects. Interlayers of a-IGZO with different electrical resistivities were controlled with various oxygen ratios during the RF sputtering deposition. As the ratio of O2/(O2 + Ar) was increased from 0 to 20%, the carrier concentration decreased from 2.84 × 1018 to 1.56 × 1014 cm–3 and the electrical resistivity increased from 0.12 to 9600 Ω·cm. Using this result, a-IGZO thin layers with different resistivities (low and high) to control the contact barriers were inserted between the a-IGZO TFT channel and both the source and drain electrodes. In the case of a-IGZO TFT with a low resistivity interlayer, the threshold voltage (V th) was shifted by −4.1 V compared to the reference device without an interlayer. In addition, on/off ratio, the subthreshold swing, and the mobility of the devices were also enhanced by achieving Ohmic contact. In contrast, the a-IGZO TFT with a high resistivity interlayer showed a positive V th shift of 1.5 V and also improved device performance, while maintaining a mobility of ∼84% of the reference device due to the energy barrier.

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“…However, these methods can damage the channel layer below the S/D electrodes, which increases the interface defects and offsets the merits of increasing n c . In addition to these doping techniques, other approaches such as controlling cation composition, metal-induced oxygen scavenging and highly conductive interlayer (IL) insertion have been employed [22][23][24][25][26][27]34,35 . These methods have an advantage in that they can reduce the barrier width without incurring damage.…”

mentioning

confidence: 99%

Specific contact resistivity reduction in amorphous IGZO thin-film transistors through a TiN/IGTO heterogeneous interlayer

Jeong,

Seo,

Kim

et al. 2024

Sci Rep

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Oxide semiconductors have gained significant attention in electronic device industry due to their high potential for emerging thin-film transistor (TFT) applications. However, electrical contact properties such as specific contact resistivity (ρC) and width-normalized contact resistance (RCW) are significantly inferior in oxide TFTs compared to conventional silicon metal oxide semiconductor field-effect transistors. In this study, a multi-stack interlayer (IL) consisting of titanium nitride (TiN) and indium-gallium-tin-oxide (IGTO) is inserted between source/drain electrodes and amorphous indium-gallium-zinc-oxide (IGZO). The TiN is introduced to increase conductivity of the underlying layer, while IGTO acts as an n+-layer. Our findings reveal IGTO thickness (tIGTO)-dependent electrical contact properties of IGZO TFT, where ρC and RCW decrease as tIGTO increases to 8 nm. However, at tIGTO > 8 nm, they increase mainly due to IGTO crystallization-induced contact interface aggravation. Consequently, the IGZO TFTs with a TiN/IGTO (3/8 nm) IL reveal the lowest ρC and RCW of 9.0 × 10−6 Ω·cm2 and 0.7 Ω·cm, significantly lower than 8.0 × 10−4 Ω·cm2 and 6.9 Ω·cm in the TFTs without the IL, respectively. This improved electrical contact properties increases field-effect mobility from 39.9 to 45.0 cm2/Vs. This study demonstrates the effectiveness of this multi-stack IL approach in oxide TFTs.

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Analysis on Contact Resistance and Effective Channel Length of Thin Film Transistors Using Composition-Modified In–Ga–Zn-O Active Channels Prepared with Atomic Layer Deposition and Various Electrode Materials

Cited by 6 publications

References 56 publications

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Enhancement of InGaZnO Thin-Film Transistors by Contact Barrier Modulation Using Oxygen Defects

Specific contact resistivity reduction in amorphous IGZO thin-film transistors through a TiN/IGTO heterogeneous interlayer

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