Analysis of the statistics of device-to-device and cycle-to-cycle variability in TiN/Ti/Al:HfO2/TiN RRAMs

Pérez, Eduardo; Maldonado, David; Acal, Christian; Castro, Juan Luis; Alonso, Francisco; Aguilera, Ana M.; Jiménez-Molinos, F.; Wenger, Ch.; Roldán, J.B.

doi:10.1016/j.mee.2019.05.004

Cited by 64 publications

(28 citation statements)

References 18 publications

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“…One of the pressing modeling questions is connected with the device inherent stochasticity that produces cycle-to-cycle variability [ 19 , 42 , 43 , 44 , 45 , 46 , 47 , 48 , 49 , 50 , 51 ]. This type of variability has to be managed to achieve RRAM technological maturity; however, even if a variability reduction is achieved, taking into consideration its nature in the modeling is a must [ 52 ]. Another modeling battlefield lies in what is linked to thermal effects.…”

Section: Introductionmentioning

confidence: 99%

On the Thermal Models for Resistive Random Access Memory Circuit Simulation

et al. 2021

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Resistive Random Access Memories (RRAMs) are based on resistive switching (RS) operation and exhibit a set of technological features that make them ideal candidates for applications related to non-volatile memories, neuromorphic computing and hardware cryptography. For the full industrial development of these devices different simulation tools and compact models are needed in order to allow computer-aided design, both at the device and circuit levels. Most of the different RRAM models presented so far in the literature deal with temperature effects since the physical mechanisms behind RS are thermally activated; therefore, an exhaustive description of these effects is essential. As far as we know, no revision papers on thermal models have been published yet; and that is why we deal with this issue here. Using the heat equation as the starting point, we describe the details of its numerical solution for a conventional RRAM structure and, later on, present models of different complexity to integrate thermal effects in complete compact models that account for the kinetics of the chemical reactions behind resistive switching and the current calculation. In particular, we have accounted for different conductive filament geometries, operation regimes, filament lateral heat losses, the use of several temperatures to characterize each conductive filament, among other issues. A 3D numerical solution of the heat equation within a complete RRAM simulator was also taken into account. A general memristor model is also formulated accounting for temperature as one of the state variables to describe electron device operation. In addition, to widen the view from different perspectives, we deal with a thermal model contextualized within the quantum point contact formalism. In this manner, the temperature can be accounted for the description of quantum effects in the RRAM charge transport mechanisms. Finally, the thermometry of conducting filaments and the corresponding models considering different dielectric materials are tackled in depth.

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Section: Introductionmentioning

confidence: 99%

On the Thermal Models for Resistive Random Access Memory Circuit Simulation

et al. 2021

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“…As stated before, the I-V curves shown in Figure 3a,b are median values. Previous measurements of this RRAM technology indicate a non-negligible amount of variability [9,15]. Especially the set and reset voltages can vary up to 1 V. Furthermore, the change of the electrical properties can be observed during cycling and temperature variations.…”

Section: Cell Variabilitymentioning

confidence: 88%

“…The CMOS compatibility is a necessity to make it economically competitive in the future, but this is not the case with every RRAM technology. Another issue is cell-to-cell and cycle-to-cycle variability [9]. Besides technological improvements, this matter can also be addressed by peripheral circuitry, which take the variability of the cells into account.…”

Section: Non-volatilementioning

confidence: 99%

A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells

et al. 2021

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In this work, we present an integrated read and programming circuit for Resistive Random Access Memory (RRAM) cells. Since there are a lot of different RRAM technologies in research and the process variations of this new memory technology often spread over a wide range of electrical properties, the proposed circuit focuses on versatility in order to be adaptable to different cell properties. The circuit is suitable for both read and programming operations based on voltage pulses of flexible length and height. The implemented read method is based on evaluating the voltage drop over a measurement resistor and can distinguish up to eight different states, which are coded in binary, thereby realizing a digitization of the analog memory value. The circuit was fabricated in the 130 nm CMOS process line of IHP. The simulations were done using a physics-based, multi-level RRAM model. The measurement results prove the functionality of the read circuit and the programming system and demonstrate that the read system can distinguish up to eight different states with an overall resistance ratio of 7.9.

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“…We shall elucidate the variability fitting algorithm of Fig. 4 using the 1T1R devices manufactured at IHP (lower left corner [35]: σ SET = 100 mV and σ RESET = 75.3 mV. Since variability at LRS/HRS is not reported in [35], we considered a variability, (σ LRS /µ LRS ) of 12.6 % and (σ HRS /µ HRS ) of 20.9 %, which is the statistically reported variability for a similar Hf O x device [5].…”

Section: Variation Fitting Methodology a Fitting Variations To mentioning

confidence: 99%

Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford–PKU Model

Reuben

Biglari

Fey

2020

IEEE Trans. Nanotechnology

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Intrinsic variability observed in resistive-switching devices (cycle-to-cycle and device-to-device) is widely recognised as a major hurdle for widespread adoption of Resistive RAM technology. While physics-based models have been developed to accurately reproduce the resistive-switching behaviour, reproducing the observed variability behavior of a specific RRAM has not been studied. Without a properly fitted variability in the model, the simulation error introduced at the device-level propagates through circuit-level to system-level simulations in an unpredictable manner. In this work, we propose an algorithm to fit a certain amount of variability to an existing physicsbased analytical model (Stanford-PKU model). The extent of variability exhibited by the device is fitted to the model in a manner agnostic to the cause of variability. Further, the model is modified to better reproduce the variations observed in a device. The model, fitted with variability can well reproduce cycle-tocycle, as well as device-to-device variations. The significance of integrating variability into RRAM models is underscored using a sensing example. Index Terms-Resistive RAM (RRAM), physics-based models, cycle-to-cycle variability, device-to-device variability, Stanford model, memristor, sense amplifier, resistive-switching, 1T-1R there cannot be a proper assessment of the functionality and yield of RRAM-based ICs, which will result in a series of expensive trial-and-errors. Pessimistic design approaches which allocate huge safety margins to accommodate variability are not recommended since they sacrifice design properties like energy, delay, and area. Consequently, there is an exigent RRAM models FEM DFT KMC Simulation speed Stanford-PKU model Classification based on abstraction levels Computational cost Physical detail Circuit µm 2-mm 2 Devicẽ 10 3 nm 3 Material few nm 3 Compact model Classification based on modeling approach Physical model (from first principles) Analytical Physics-based Black-box (measurement) Stanford-PKU model

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Analysis of the statistics of device-to-device and cycle-to-cycle variability in TiN/Ti/Al:HfO2/TiN RRAMs

Cited by 64 publications

References 18 publications

On the Thermal Models for Resistive Random Access Memory Circuit Simulation

On the Thermal Models for Resistive Random Access Memory Circuit Simulation

A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells

Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford–PKU Model

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