Analysis of Synchronizer, Data Loss and Occurrence of Metastability

Patharkar, Ankush S.; Khetade, Vivek E.; Limaye, S. S.; Bhopale, Ashish S.; Patharkar, Akshay S.

doi:10.1109/icesc.2014.77

Cited by 4 publications

(1 citation statement)

References 11 publications

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“…are done in [9] depending on frequencies of receiver and transmitter. Simulation results show that there is no data loss when the receiver frequency is higher and synchronizer is used.…”

Section: Synchronizer Performance Is Based On Mtbf (Mean Time Between Failures) Three Experimentsmentioning

confidence: 99%

Analysis of Metastability for the Synchronizer of NoC

Jiang¹,

Kim²

2014

The Journal of the Korea institute of electronic communication

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Bus architecture of SoC has been replaced by NoC in recent years. Noc uses the multi-clock domains to transmit and receive data between neighbor network interfaces and they have same frequency, but a phase difference because of clock skew. So a synchronizer is used for a mesochronous frequency in interconnection between network interfaces. In this paper the metastability is defined and analyzed in a D latch and a D flip-flop to search the possibilities that data can be lost in the process of sending and receiving data between interconnects when a local frequency and a transmitted frequency have a phase difference. 180nm CMOS model parameter and 1GHz are used to simulate them in HSpice. The simulation results show that the metastability happens in a latch and a flip-flop when input data change near the clock edges and there are intermediate states for a longer time as input data change closer at the clock edge. And the next stage can lose input data depending on environmental conditions such as temperature, processing variations, power supply, etc. The simulation results are very useful to design a mescochronous synchronizer for NoC

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“…are done in [9] depending on frequencies of receiver and transmitter. Simulation results show that there is no data loss when the receiver frequency is higher and synchronizer is used.…”

Section: Synchronizer Performance Is Based On Mtbf (Mean Time Between Failures) Three Experimentsmentioning

confidence: 99%

Analysis of Metastability for the Synchronizer of NoC

Jiang¹,

Kim²

2014

The Journal of the Korea institute of electronic communication

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Jitter and metastability analysis and modeling of multilevel bang‐bang phase detector

Salem

Saneei

Abbasi‐Moghadam

2020

Circuit Theory & Apps

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SummaryBang‐bang phase detector (BBPD) is one of the essential blocks in the phase‐locked loop and clock and data recovery that are used in transceivers. But BBPD has the metastability problem as data change in timing window. It suffers from not only metastability failure but also quantization noise, which causes output jitter. In this paper, the novel model is presented to evaluate the effect of both metastability and jitter on ML‐BBPD, and also, it is shown that multilevel BBPD (ML‐BBPD) has the improved quantization noise in comparison with the Alexander BBPD. In this model, it is shown that by increasing the oversampling ratio, the quantization noise is decreased, and with the metastability effect and the increment of quantization steps, the characteristic curve of the ML‐BBPD becomes more smoothed. Also, the output jitter of ML‐BBPD, in which metastability failure is diminished, is modeled. The error function in the model is simulated at system level and compares with the results achieved from simulation at circuit level to prove the validity of the proposed model. The simulation is done in TSMC 65‐nm CMOS technology under 1‐V supply voltage to compare the characteristic of ML‐BBPD for various number of sampling clocks.

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Open loop and closed loop solution for clock domain crossing faults

Hatture

Dhage²

2015

2015 Global Conference on Communication Technologies (GCCT)

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Analysis of Synchronizer, Data Loss and Occurrence of Metastability

Cited by 4 publications

References 11 publications

Analysis of Metastability for the Synchronizer of NoC

Analysis of Metastability for the Synchronizer of NoC

Jitter and metastability analysis and modeling of multilevel bang‐bang phase detector

Open loop and closed loop solution for clock domain crossing faults

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