Analysis of static and dynamic behaviour of SiC and Si devices connected in cascode configuration

Mihaila, A.; Udrea, F.; Azar, R.; Brezeanu, Gheorghe

doi:10.1109/smicnd.2001.967477

Cited by 13 publications

(6 citation statements)

References 14 publications

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“…To solve this problem, the Si/SiC Cascode configuration has been proposed. The Si/SiC Cascode configuration is formed by series-connecting a low-voltage (LV) Si MOSFET with a high-voltage (HV) SiC normally-on JFET [12], and thus the normally-on operation of the SiC JFET is converted into normally-off operation. Furthermore, it means that the Si/SiC Cascode device has a simple gate drive, a reliable MOS gate, an excellent built-in anti-parallel diode, and has the ability of high-voltage and high-speed operations [13], [14].…”

Section: Introductionmentioning

confidence: 99%

Investigation on the Degradation Mechanism of Si/SiC Cascode Device Under Repetitive Short-Circuit Tests

Zhang,

Liu,

Zhou

2024

IEEE Open J. Power Electron.

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The Si/SiC Cascode device has been widely accepted in various applications, however, its reliability issue still remains a major concern and needs to be extensively investigated. In this paper, the degradation of a 750 V Si/SiC Cascode device under repetitive short-circuit (SC) tests is investigated at 400 V DC-link voltage. Static and dynamic characteristics are measured before and after the repetitive SC cycles. As the SC cycle increases, the degradation of the device becomes gradually significant. By linking changes in electrical properties to metallization degradation, the physical mechanism of device degradation has been uncovered in depth. Experimental results show that the continuous stress under repetitive SC cycle leads to an increase in the on-state resistance of Si/SiC Cascode device. Finite-element-model (FEM) simulations show that due to the pad current crowding in the source region, the source Al metallization temperature of the SiC JFET rapidly increases to the melting point and undergoes reconstruction, resulting in a significant increase in the source Al metallization resistance. In addition, it is found by scanning electron microscopy (SEM) that the gate metal aluminum of SiC JFET chip also undergoes reconstruction, which is the reason for the degradation of the dynamic characteristics. The research in this paper will provide useful evidences for device manufactures to design Si/SiC Cascode device with high reliability.

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Section: Introductionmentioning

confidence: 99%

Investigation on the Degradation Mechanism of Si/SiC Cascode Device Under Repetitive Short-Circuit Tests

Zhang,

Liu,

Zhou

2024

IEEE Open J. Power Electron.

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“…To use a normally‐on SiC JFET for a SiC normally‐off device, a cascade connection [16‐18] consisting of a normally‐on SiC JFET and an enhanced Si power MOSFET has been developed. However, the cost of power switching devices in this type of design is increased.…”

Section: Introductionmentioning

confidence: 99%

AC‐coupled gate driver with gate current switch under single power supply for normally‐off SiC JFET

Sakamoto

Yokoyama

Hozoji

2020

IEEJ Transactions Elec Engng

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Theoretically, normally-off silicon carbide (SiC) junction field-effect transistors (JFETs) do not require a negative gate voltage supply because they are in an off-state when the gate-source voltage is 0 V. However, most gate drivers for normally-off SiC JFETs require not only a positive power supply for turning on the JFET but also a negative power supply for turning it off and maintaining a negative gate-source voltage to suppress a false turn-on power loss caused by crosstalk during fast switching. Therefore, modifications of gate drivers increase complications and costs. In this study, a normally-off SiC JFET gate driver, which can be realized using a simple circuit configuration with a single power supply, is proposed. To minimize undesirable crosstalk, the gate-source voltage of the JFET is driven to a negative value and retained in the state for a long period of time.

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“…The cascode configuration is well known and has been used and studied in depth [10][11][12][13][14] for some time now, although its use has not been so widespread. However, the appearance of the new SiC devices has led to renewed use of this configuration due to the fact that it enables the speed of SiC devices to be exploited while maintaining a typical commercial driver to control the switch.…”

Section: Introductionmentioning

confidence: 99%

Switching Performance Comparison of the SiC JFET and SiC JFET/Si MOSFET Cascode Configuration

Rodríguez

Díaz

Lamar

et al. 2014

IEEE Trans. Power Electron.

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Silicon Carbide (SiC) devices are becoming increasingly available on the market due to the mature stage of development fact of their manufacturing process. Their numerous advantages compared to silicon (Si) devices, such as, for example, higher blocking capability, lower conduction voltage drop and faster transitions make them more suitable for high-power and high-frequency converters. The aim of this paper is to study the switching behavior of the two most-widely studied configurations of SiC devices in the literature: the normally-on SiC JFET and the cascode using a normally-on SiC JFET and a low-voltage Si MOSFET. A detailed comparison of the turn-on and turn-off losses of both configurations is provided and the results are verified against experimental efficiency results obtained in a boost converter operating in both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). Furthermore, special attention will be paid to the switching behavior of the cascode configuration, analyzing the effect of its low-voltage Si MOSFET and comparing different devices. The study carried out will confirm that the overall switching losses of the JFET are lower, making it more suitable for operating in CCM in terms of the overall converter efficiency. However, the lower turn-off losses of the cascode show this device to be more suitable for DCM when ZVS is achieved at the turn-on of the main switch. Finally, all the theoretical results have been verified in an experimental 600W boost converter.

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Analysis of static and dynamic behaviour of SiC and Si devices connected in cascode configuration

Cited by 13 publications

References 14 publications

Investigation on the Degradation Mechanism of Si/SiC Cascode Device Under Repetitive Short-Circuit Tests

Investigation on the Degradation Mechanism of Si/SiC Cascode Device Under Repetitive Short-Circuit Tests

AC‐coupled gate driver with gate current switch under single power supply for normally‐off SiC JFET

Switching Performance Comparison of the SiC JFET and SiC JFET/Si MOSFET Cascode Configuration

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