Analysis of stability improvement in ZnO thin film transistor with dual-gate structure under negative bias stress

Yun, Ho‐Jin; Kim, Young-Su; Jeong, Kwang‐Seok; Kim, Yumi; Yang, Seung‐Dong; Lee, Hi‐Deok; Lee, Ga‐Won

doi:10.7567/jjap.53.04ef11

Cited by 10 publications

(5 citation statements)

References 30 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, when the UV irradiation time is 1 min, the offset of NBS is still slightly reduced compared with the untreated device, the Vth offset is only 0.073V. The UV treatment method is superior to the stability of a-IGZO TFT and ZnO-TFT processed by other methods [36]- [39]. Figure 6 shows the positive bias illumination stress (PIBS) and negative bias illumination stress (NIBS) test results, which exhibits an similar behavior with that of PBS and NBS.…”

Section: Resultsmentioning

confidence: 99%

Improvement in Bias Stability of IGZO TFT With Etching Stop Structure by UV Irradiation Treatment of Active Layer Island

Pan

Yang

Chen

et al. 2020

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

In this paper, the effect of ultraviolet (UV) irradiation treatment of active layer IGZO on the bias stability of amorphous IGZO thin film transistor with etch stop (ES) structure is studied. Along with the increase in UV irradiation time, the surface of the IGZO film becomes smoother. An appropriate UV irradiation treatment cannot only improve the bias stress stability but also suppress the lump behavior generated by light illumination. The devices with irradiation time of 1 min exhibits an excellent properties with the field effect mobility of 15.07 cm 2 /V•s, subthreshold swing of 0.2 V/dec, and all bias stress less than 0.2 V including NIBS and PIBS. However, a relative long UV treatment would result in deteriorating the bias stability of devices. The fact implies that the reasonable UV irradiation treatment on the active layer island before depositing the ES layer is advantageous for improving the stability of the a-IGZO TFT device. INDEX TERMS a-IGZO thin film transistor, UV irradiation, stability.

show abstract

Section: Resultsmentioning

confidence: 99%

Improvement in Bias Stability of IGZO TFT With Etching Stop Structure by UV Irradiation Treatment of Active Layer Island

Pan

Yang

Chen

et al. 2020

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

show abstract

“…In the dual gate structure, the gate bias is applied at both sides of the channel, follow by electric field cancellation occurs. The stress stability of the dual gate device is strongly related with to its electric field distribution [11].…”

Section: Resultsmentioning

confidence: 99%

69.3: a‐IGZO TFTs Reliability Improvement by Dual Gate Structure

Chang

Chen

Chang

et al. 2015

Symp Digest of Tech Papers

View full text Add to dashboard Cite

The positive bias thermal stress (PBTS), negative bias thermal stress (NBTS) and negative bias illumination stress (NBIS) stabilities of dual gate amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors via applying different top gate voltage is concentrated in this paper. These dual gate devices show better PBTS/NBTS stress stabilities (smaller ΔV th shift) than conventional bottom gate TFT device. Additionally, these dual gate devices also exhibits better NBIS stress results than conventional bottom gate TFT device.

show abstract

“…NBS of V GS = −20 V with V DS = 0 was applied, which resulted in negative threshold voltage ( V T ) shift. After applying voltage stress for 1000 s, in dual-gate ZnO TFT, the the V T shift was 0.60 V, while in a bottom-gate ZnO TFT, the V T shift was 2.52 V. The stress immunity of the dual-gate device was result of modulation in field distribution or potential profile in the ZnO channel due to addition of another gate (Yun et al , 2014).…”

Section: Challenges In Zno Tft Technologymentioning

confidence: 99%

Perspective of zinc oxide based thin film transistors: a comprehensive review

Kandpal

Gupta

2018

View full text Add to dashboard Cite

Purpose The purpose of this paper is to present a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs). This paper presents the development of TFT technology starting from amorphous silicon, poly-Si to ZnO TFTs. This paper also discusses about transport and device modeling of ZnO TFT and provides a comparative analysis with other TFTs on the basis of performance parameters. Design/methodology/approach It highlights the need of high–k dielectrics for low leakage and low threshold voltage in ZnO TFTs. This paper also explains the effect of grain boundaries, trap densities and threshold voltage shift on the performance of ZnO TFT. Moreover, it also addresses the challenges like requirement of stable p-type ZnO semiconductor for various electronic applications and high value of ZnO mobility to meet growing demand of high-definition light emitting diode TV (HD-LED TV). Findings This review will motivate the readers to further investigate the conduction mechanism, best alternate for gate-dielectric and the deposition technique optimization for the enhancement of the performance of ZnO TFTs. Originality/value This is a literature review. The technological evolution of TFT in general and ZnO TFT in particular is presented in this paper.

show abstract

Analysis of stability improvement in ZnO thin film transistor with dual-gate structure under negative bias stress

Cited by 10 publications

References 30 publications

Improvement in Bias Stability of IGZO TFT With Etching Stop Structure by UV Irradiation Treatment of Active Layer Island

Improvement in Bias Stability of IGZO TFT With Etching Stop Structure by UV Irradiation Treatment of Active Layer Island

69.3: a‐IGZO TFTs Reliability Improvement by Dual Gate Structure

Perspective of zinc oxide based thin film transistors: a comprehensive review

Contact Info

Product

Resources

About