Analysis of Space-Space-Space Clos-Network Packet Switch

Abstract

The throughput of a packet switch is a major switch property, and therefore, of major interest to analyze it. An approximation of the throughput of a staged random selection algorithm with a single iteration under uniform for a three-stage Clos-network packet switch, also called a Space-Space-Space (S 3 ) Clos-network packet switch, has been recently presented. However, the difference between this approximation and the actual throughput of the staged random selection algorithm is significant. To address this issue, this paper presents a theoretical throughput analysis of the staged random selection algorithm with a single iteration for a S 3 Clos-network switch and show that the throughput is higher than that estimated by the existing approximation. Second, the paper extends the analysis to calculate the throughput of the staged random selection algorithm with multiple iterations by considering the analysis of the parallel iterative matching scheme, which is a random-based matching scheme for single-stage switches. The introduced derivation carefully considers the behavior of the selection algorithm at the switching modules in all three stages of the switch. The probability that a request reaches the third-stage modules is affected by the matching results at the second-stage modules. Numerical evaluations of the analytical formulas are performed. The results show that the staged random selection algorithm with multiple iterations for a S 3 Clos-network switch without internal expansion can achieve 100% throughput under uniform traffic.

Routing of asynchronous Clos networks

“…Instead of using a first-in-first-out (FIFO) queue for each IP which limits the throughput to 58.6% [18], breaking the queue into N logical VOQs and storing data heading to different OPs in individual VOQs achieves 100% throughput [17]. This buffer technique can be used in input-buffered switches [9], [17] or inside the IMs of MSM Clos networks [4].…”

“…MSM is the most utilized scheme in ATM networks. Buffers in IMs and OMs improve throughput without the out-of-order problem but the OMs are required to speed-up m times to avoid throughput degradation (the detailed comparison of buffer insertion schemes and memory speed-up can be found in [2], [9]). …”

“…On the other hand, heuristic algorithms are fast and spatially distributed. Most of current dynamically reconfigurable Clos networks utilize heuristic algorithms [3]- [9].…”

“…The random dispatching algorithm used in the ATLANTA chip [3] demonstrates a feasible way of dynamically reconfiguring a three-stage Clos network using heuristic algorithms. Subsequently, numerous routing algorithms have been proposed to improve throughput [4]- [9]. A Clos network W. Song designed for current optical backbone networks has already achieved peta-bit throughput [6].…”

A Multi-Stage Packet-Switch Based on NoC Fabrics for Data Center Networks

“…As in single-stage, buffer placement defines the type of the multistage Clos switch. According to the stage where buffers are inserted, a Clos network could be a Space-Space-Space (S 3 ) [6] network without buffers or Memory-Memory-Memory (MMM) [7] with buffered switching units in all stages. Other combinations have also been studied [8] [9].…”