Analysis of Phase-Locked Loop Low-Frequency Stability in Three-Phase Grid-Connected Power Converters Considering Impedance Interactions

Abstract

Synchronous reference frame (SRF) phase-locked loop (PLL) is a critical component for the control and grid synchronization of three-phase grid-connected power converters. The PLL behaviors, especially its low-frequency dynamics, influenced by different grid and load impedances as well as operation mode have not been investigated yet, which may not be captured by conventional linear PLL models. In this paper, we propose a state-feedback quasi-static SRF-PLL model, which can identify and quantify the inherent frequency self-synchronization mechanism in the converter control system. This self-synchronization effect is essentially due to the converter interactions with grid impedance and power flow directions. The low-frequency nonlinear behaviors of the PLL under different grid impedance conditions are then analyzed, which forms the framework of evaluating the impacts of the large penetration level of distributed generation units, weak grid, microgrid, and large reactive power consumption in terms of the frequency stability of PLL. Specifically, the PLL behavior of the converter system under islanded condition is investigated to explain the PLL instability issues and the related islanding-detection methods in early publications and industry reports

A Novel Control Scheme for T-Type Three-Level SSG Converters Using Adaptive PR Controller with a Variable Frequency Resonant PLL

“…Therefore, the output frequency ω e is used to modify the resonant frequency of the compensator. Then, self-adaptive tracking of the resonant frequency can be realized [28]- [30].…”

“…When the detected voltage is distorted by low-order harmonics or switching frequency harmonics, the precise frequency and phase are hard to obtain by a general digital PLL (DPLL) which is called a traditional PLL [27]. In some references, an enhanced PLL is proposed to lock the frequency in a polluted utility grid [27]- [30]. The authors of [28] propose a grid synchronization PLL based on an adaptive low-pass notch filter, which is a modified version of a PLL based on the fast Fourier transform, which is robust to harmonics and imbalances of the grid voltage.…”

“…The authors of [28] propose a grid synchronization PLL based on an adaptive low-pass notch filter, which is a modified version of a PLL based on the fast Fourier transform, which is robust to harmonics and imbalances of the grid voltage. The authors of [30] present a state-feedback quasi-static PLL model, which can identify and quantify the inherent frequency self-synchronization mechanism in converter control systems. All of these methods realize the grid-phase lock under harmonic distortions but do not take wide frequency variations into consideration and are hard to design in digital signal processors.…”

Optimal Design and Real Time Implementation of Autonomous Microgrid Including Active Load

“…Behind that, active load needs to be synchronized with the microgrid. Phase locked loop (PLL) is used for synchronization [24,25]. Difficult tuning of the PLL parameters and its negative effect on the controller performance are almost the main PLL drawbacks [24].…”

“…Phase locked loop (PLL) is used for synchronization [24,25]. Difficult tuning of the PLL parameters and its negative effect on the controller performance are almost the main PLL drawbacks [24]. Moreover, the coupling effect and interactions between the PLL itself and the system impedance lead to a potential instability issue [25].…”