Analysis of Low-Frequency Noise in Switched MOSFET Circuits: Revisited and Clarified

Abstract

Traps that are located in the gate oxide of MOSFETs have been established as a cause of low-frequency noise phenomena. Analysis of such noise is usually based on frequency domain, stationary models. It has been shown that such simplistic models produce erroneous results for circuits with time-varying bias conditions. Tian et al. proposed an idealized trap model with the goal of capturing the nonstationary behavior of oxide traps, and were able to elucidate the experimentally observed large noise power reduction in switched MOSFET circuits which eluded any explanation obtainable with legacy stationary models. In this paper, we build on their seminal work and first identify an oversight in their model derivation which had produced an incorrect expression for the single trap noise spectrum. We next derive the correct spectrum expression, verify it against detailed idealized trap simulations and discuss its implications. The idealized trap model is amenable to analytical derivations and useful as a first stage in understanding nonstationary trap noise. We then demonstrate that noise simulations based on a detailed trap description implemented in a compact MOSFET model in a circuit simulator are needed for an accurate characterization of low-frequency noise in switched MOSFET circuits that matches experimental results.Index Terms-Low-frequency noise, noise analysis, nonstationary noise, RTS noise.

Analysis and Validation of Low-Frequency Noise Reduction in MOSFET Circuits Using Variable Duty Cycle Switched Biasing

“…The other reason for the the discrepancy is the reappearance of the 1/f noise. This effect has been discussed in [29] - [32]. Our model is based on the assumption that λ off T off >> 1, as λ off is very high for all traps.…”

“…In Fig. 2 comparison is shown between stationary PSD and switched PSD based on the models proposed in [27,29], and this work. The model, shown in [27] predicts 33 dB reduction in the RTS noise PSD as compared to the standard model, whereas in [29] a noise reduction of 86 dB is claimed.…”

“…In the final region (iii) (for the sampling frequencies above the λ H ), the Brownian noise is proportional to the f −2 . In [29], the RTS noise PSD is derived for a MOS-FET device with switched biasing using square waveform (50 % duty cycle) at the gate of the MOSFET as a control input. In [29] it is concluded that the RTS noise reduction depends on the f s .…”

“…A. G. Mahmutoglu et at. [29] found that the limits taken in [27], to calculate the time-averaged autocorrelation function (ACF) for trap state N (t), were incorrect. In [29] and [30], an improved analysis of the RTS noise was presented for switched biasing, using square wave (50% duty cycle (D)) as input to a MOS transistor gate.…”

“…[29] found that the limits taken in [27], to calculate the time-averaged autocorrelation function (ACF) for trap state N (t), were incorrect. In [29] and [30], an improved analysis of the RTS noise was presented for switched biasing, using square wave (50% duty cycle (D)) as input to a MOS transistor gate. In these and other papers on the low-frequency noise reduction [18][19][20][21][22][23][27][28][29][30][31][32][33] the transistors are switched with either 50% or 25% duty cycle and without multiple stages thereby leading to a discontinuous output.…”