Analysis of DC negative feedback mechanism in stacked power amplifiers

Abstract

Transistor stacking is a promising technique to increase the working voltage and output power of power amplifiers (PAs). A DC negative feedback mechanism in stacked PAs is analyzed and verified through measurement in this paper. This negative feedback mechanism ensures the stability of stacked PAs at DC conditions. Based on the analysis of this mechanism, the DC biasing procedure of stacked PAs is also analyzed in this paper. Finally, an experiment is performed to verify our analysis. The results of this paper prove the feasibility and stability of the stacked PA.