Analysis of Bounds on Hybrid Vector Clocks

Yingchareonthawornchai, Sorrachai; Nguyen, Duong; Kulkarni, Sandeep S.; Demirbaş, Murat

doi:10.1109/tpds.2018.2818700

Cited by 5 publications

(6 citation statements)

References 13 publications

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“…The i th component of such array at process x denotes the value of the scalar clock of process i as known by process x at that time. Several works in the literature attempted to reduce the size of the Vector Clock [12], [13], [14], [15], [16], [17], [18], [19], [20], [21], [22], [23], [24], but they had to make some compromises in accuracy, and/or had limited applicability, and/or had to alter the system model, and in the worst-case, were as lengthy as the Vector Clock. We review these next.…”

Section: Related Workmentioning

confidence: 99%

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Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Pozzetti

Kshemkalyani

2021

IEEE Trans. Parallel Distrib. Syst.

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Causality tracking among events is a fundamental challenge in distributed environments. Much previous work on this subject has focused on designing an efficient and scalable protocol to represent logical time. Several implementations of logical clocks have been proposed, most recently the Encoded Vector Clock (EVC), a protocol to encode Vector Clocks (VC) in scalar numbers through the use of prime numbers, to improve performance and scalability. We propose and formalize the concept of Resettable Encoded Vector Clock (REVC), a new logical clock implementation, which builds on the EVC to tackle its very high growth rate issue. We show how our REVC can be applied in both shared memory systems and message passing systems to achieve a consistent logical clock. We show, through practical examples, the advantage of REVC's growth rate with respect to EVC's growth rate. Finally, we show a practical application of the REVC to the dynamic race detection problem in multi-threaded environments. We compare our tool to the currently existing VC-based tool DJIT + to show how the REVC can help in achieving higher performance with respect to the Vector Clock.

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Section: Related Workmentioning

confidence: 99%

“…Logical physical clocks combine physical clocks (such as NTP) with logical clocks [19], [20]. This scheme deals only with weak causality, i.e., a → b =⇒ Clock a < Clock b , and is meant for applications where only weak causal relations in the immediate past are relevant.…”

Section: Related Workmentioning

confidence: 99%

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Pozzetti

Kshemkalyani

2021

IEEE Trans. Parallel Distrib. Syst.

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“…We can also extend it to vector clocks [10], [20] or hybrid vector clocks [24]. Vector clocks maintain the variable vc.j.k for each pair j and k. This variable captures the knowledge that j has about k. And, vc.j.j denotes a counter maintained by j for itself.…”

Section: Application Of Our Algorithm In Vector Clocksmentioning

confidence: 99%

Preserving Stabilization While Practically Bounding State Space

Valapil

Kulkarni²

2017

2017 13th European Dependable Computing Conference (EDCC)

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Abstract-Stabilization is a key dependability property for dealing with unanticipated transient faults, as it guarantees that even in the presence of such faults, the system will recover to states where it satisfies its specification. One of the desirable attributes of stabilization is the use of bounded space for each variable.In this paper, we present an algorithm that transforms a stabilizing program that uses variables with unbounded domain into a stabilizing program that uses bounded variables and (practically bounded) physical time. While non-stabilizing programs (that do not handle transient faults) can deal with unbounded variables by assigning large enough but bounded space, stabilizing programs -that need to deal with arbitrary transient faults-cannot do the same since a transient fault may corrupt the variable to its maximum value.We show that our transformation algorithm is applicable to several problems including logical clocks, vector clocks, mutual exclusion, leader election, diffusing computations, Paxos based consensus, and so on. Moreover, our approach can also be used to bound counters used in an earlier work by Katz and Perry for adding stabilization to a non-stabilizing program. By combining our algorithm with that earlier work by Katz and Perry, it would be possible to provide stabilization for a rich class of problems, by assigning large enough but bounded space for variables.

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“…Marzullo [15] described another global state enumeration method that included both logical time and physical time with Hybrid Vector Clocks (HVC). Because of some synchronization, HVC timestamp size may be less than n while preserving properties of VC [23]. In partial synchrony, the trade-off in terms of precision and recall monitoring was discussed in [22].…”

Section: Related Workmentioning

confidence: 99%

Monitoring Partially Synchronous Distributed Systems Using SMT Solvers

Valapil

Yingchareonthawornchai

Kulkarni

et al. 2017

Runtime Verification

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In this paper, we discuss the feasibility of monitoring partially synchronous distributed systems to detect latent bugs, i.e., errors caused by concurrency and race conditions among concurrent processes. We present a monitoring framework where we model both system constraints and latent bugs as Satisfiability Modulo Theories (SMT) formulas, and we detect the presence of latent bugs using an SMT solver. We demonstrate the feasibility of our framework using both synthetic applications where latent bugs occur at any time with random probability and an application involving exclusive access to a shared resource with a subtle timing bug. We illustrate how the time required for verification is affected by parameters such as communication frequency, latency, and clock skew. Our results show that our framework can be used for real-life applications, and because our framework uses SMT solvers, the range of appropriate applications will increase as these solvers become more efficient over time.

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Analysis of Bounds on Hybrid Vector Clocks

Cited by 5 publications

References 13 publications

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Preserving Stabilization While Practically Bounding State Space

Monitoring Partially Synchronous Distributed Systems Using SMT Solvers

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