2012
DOI: 10.1049/iet-pel.2011.0354
|View full text |Cite
|
Sign up to set email alerts
|

Analysis, design and implementation of a new zero-voltage-switching interleaved asymmetrical half-bridge converter using an integrated transformer

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

0
14
0

Year Published

2014
2014
2020
2020

Publication Types

Select...
5
1

Relationship

0
6

Authors

Journals

citations
Cited by 11 publications
(14 citation statements)
references
References 18 publications
0
14
0
Order By: Relevance
“…Hence, the duty cycle D of the proposed converter is initially chosen to be 0.65, which is an average value of 0.6 and 0.7. By substituting this value, (25) and the system specifications shown in Table II, into (7), N 2 can be expressed as…”
Section: Section Of Turns Ratio and Duty Cyclementioning
confidence: 99%
See 2 more Smart Citations
“…Hence, the duty cycle D of the proposed converter is initially chosen to be 0.65, which is an average value of 0.6 and 0.7. By substituting this value, (25) and the system specifications shown in Table II, into (7), N 2 can be expressed as…”
Section: Section Of Turns Ratio and Duty Cyclementioning
confidence: 99%
“…Besides, because of this circuit structure, the corresponding output current ripple is higher than that of the traditional forward converter. Moreover, some half-bridge-type isolated converters are presented [21][22][23][24][25]. In [25], a half-bridge-type converter, which integrates the forward and flyback converters by sharing a single core, is presented.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…When the dimming range is large, the voltage of the dc-link capacitor changes greatly. Generally, the methods of symmetrical pulse-width modulation (PWM) or asymmetrical pulse-width modulation (ASPWM) are often used to control the active switches to regulate LED power [16][17][18][19]. When both control schemes are compared, the voltage across the dc-link capacitor of the PWM scheme is higher than that of the ASPWM one [18,19].…”
Section: Introductionmentioning
confidence: 99%
“…Generally, the methods of symmetrical pulse-width modulation (PWM) or asymmetrical pulse-width modulation (ASPWM) are often used to control the active switches to regulate LED power [16][17][18][19]. When both control schemes are compared, the voltage across the dc-link capacitor of the PWM scheme is higher than that of the ASPWM one [18,19]. Although the ASPWM scheme always incurs noticeable dc-offset current in the transformer, resulting in increasing transformer core loss [20], the dc-offset current can be easily eliminated by connecting a dc-balance capacitor in series with the primary winding.…”
Section: Introductionmentioning
confidence: 99%