Analysis and VLSI Realization of a Blind Beamforming Algorithm

Abstract

We present the fixed-point analysis and VLSI realization of a maximum-power blind beamforming algorithm. This algorithm consists of the computation of a correlation matrix and its dominant eigenvector, and we propose that the latter be accomplished by the power method. After analyzing the numerical stability of the power method, we derive a division-free form of the algorithm. Based on a block-Toeplitz assumption, we design an FIR filter based system to realize both the correlation computation and the power method. Our ring processor, which is optimized to implement digital filters, is used as the core of the architecture. A special technique for dynamically switching filter inputs is shown to double the system throughput. VLSI design is discussed in detail and chip fabrication results are presented.