Analysis and Optimization of an Analog MOSFET with a Slit Well at Channel Center Towards Higher Output Resistance

Fujii, Hiroki; Yoo, Jaehyun; Jeong, Dawon; Min, Sung-Hwan; Kim, Myoungsoo; Kwon, Uihui; Kim, Dae Sin

doi:10.1109/essderc55479.2022.9947095

ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference (ESSDERC) 2022

DOI: 10.1109/essderc55479.2022.9947095

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Analysis and Optimization of an Analog MOSFET with a Slit Well at Channel Center Towards Higher Output Resistance

Hiroki Fujii¹,

Jaehyun Yoo²,

Dawon Jeong³

et al.

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Analysis and Optimization of an Analog MOSFET with a Slit Well at Channel Center Towards Higher Output Resistance

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