Analysis and Optimization Design Scheme of CMOS Ultra-Wideband Reconfigurable Polyphase Filters on Mismatch and Voltage Loss

Abstract

This manuscript presents an analysis and optimization scheme for the ultra-wideband passive reconfigurable polyphase filters (PPFs) to minimize I/Q (in-phase and quadrature-phase) phase/amplitude mismatch and voltage loss. By building a mathematical model of the voltage transfer, the relationship between the resonant frequency of each stage and the I/Q mismatch and the relationship between the network impedance and the voltage loss are revealed, providing a scheme for PPF optimization. The proof-of-concept 2~8 GHz wideband reconfigurable PPF is designed in a 55 nm CMOS process. The optimization scheme enables the designed PPF to achieve an I/Q phase mismatch within 0.2439° and an I/Q amplitude mismatch within 0.098 dB throughout the entire band, and it shows great robustness during Monte Carlo sampling. The maximum voltage loss is 17.7 dB, and the total chip area is 0.174 × 0.145 mm2.