Analysis and Implementation of a New Three-Level Converter

Abstract

This study presents a new interleaved three-level zero-voltage switching (ZVS) converter for high-voltage and high-current applications. Two circuit cells are operated with interleaved pulse-width modulation in the proposed converter to reduce the current ripple at the input and output sides, as well as to decrease the current rating of output inductors for high-load-current applications. Each circuit cell includes one half-bridge converter and one three-level converter at the primary side. At the secondary side, the transformer windings of two converters are connected in series to reduce the size of the output inductor or switching current in the output capacitor. Based on the three-level circuit topology, the voltage stress of power switches is clamped at V in /2. Thus, MOSFETs with 500 V voltage rating can be used at 800 V input voltage converters. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval. Therefore, power switches can be turned on under ZVS. Finally, experiments verify the effectiveness of the proposed converter.

Three-Phase Series Resonant DC-DC Boost Converter With Double LLC Resonant Tanks and Variable Frequency Control

“…Despite the fact that, single stage resonant converters are well-entrenched and advanced in many applications, nevertheless they face some challenges in high input voltage applications, where the current stress on switches devices cause a reduction in both efficiency and reliability [19]. Therefore, this has led to the introduction of multilevel converters, that allows the use of low voltage rating switching devices for high voltage applications [20], [21]. Moreover, the operating modes of three-phase three-level are discussed in [22], where the soft switching range is clearly enlarged when compared to PWM controlled three phase three level converter [23].…”

Actively Clamped Two-Switch Flyback Converter with High Efficiency

“…(10) At t = t 3 , to achieve ZCS of D o , the diode current i Do becomes zero before D o is turned off. The time interval from t 3 to t 4 should be ensured to achieve ZCS of D o . This time duration can be changed by the angular resonant frequency ω r .…”

Voltage Source Inverter Drive Using Error-compensated Pulse Width Modulation

“…For example, the extended-state observer-based control scheme [9] is proposed to reduce current harmonics. The interleaved PWM is suggested to reduce output current ripple [10]. The filtered PWM [6] is shown to attenuate baseband harmonics, especially for small modulation index reference.…”

“…The tradeoff between switching loss and harmonic distortion remains a critical design issue. Several PWM techniques are discussed to reduce distortion given a fixed switching frequency [4]- [10]. For example, the extended-state observer-based control scheme [9] is proposed to reduce current harmonics.…”