Analysis and Experimental Tests of a Solid-State Fault Current Limiter

Abstract

The increase in distribution power demand and distributed generation may lead to a rise in power substation fault current levels. One possible solution to this problem is the use of a Solid-State Fault Current Limiter (SS-FCL). In this context, this paper proposes the concept of a bridge-type solid-state device switching an air-core reactor as an SS-FCL topology. The overvoltage protection system details are presented, along with an explanation of the fault detection algorithm control's principle. An experimental setup is designed to evaluate various events in addition to the short circuit, such as load-steps, harmonic loads, motor startups and transformer’s inrush. Fault current is detected within one millisecond, with a total reduction of 42%. The overvoltage protection system clamped the peak voltage across the semiconductor switch and kept the dv/dt below the maximum stipulated. The load input tests showed a proper limiting operation, provided the device is within the parameterization range.