Analysis and Design of Fully Integrated High-Power Parallel-Circuit Class-E CMOS Power Amplifiers

Lee, Ockgoo; An, Kyungwon; Kim, Hyungwook; Lee, Dong Hoon; Han, Jae‐Hung; Yang, Kuan; Lee, Chang-Ho; Kim, Haksun; Laskar, J.

doi:10.1109/tcsi.2009.2023944

Cited by 38 publications

(13 citation statements)

References 29 publications

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“…In the analysis of PA, except the resistor R L , all of the elements are supposed to be ideal and the transistor is an ideal switch with zero and infinite resistance when turns on and off, respectively. Two equations define the class-E PA conditions, as below: (Apostolidou, et al, 2009;Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006) …”

Section: Circuit Descriptionmentioning

confidence: 99%

“…The class-E power amplifier can ideally achieve 100% efficiency. This high efficiency has spurred many research interests on the design and analysis of Class-E Pas (Apostolidou, et al, 2009;Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006). The conventional class-E power amplifier can produce large power levels with good efficiency (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002.…”

Section: Introductionmentioning

confidence: 99%

“…This high efficiency has spurred many research interests on the design and analysis of Class-E Pas (Apostolidou, et al, 2009;Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006). The conventional class-E power amplifier can produce large power levels with good efficiency (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002. Most of the existing Class-E PA designs have been optimized to work at high output power levels, ranging from 23 to 33 dBm (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006;Mousa, 2013).…”

Section: Introductionmentioning

confidence: 99%

“…The conventional class-E power amplifier can produce large power levels with good efficiency (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002. Most of the existing Class-E PA designs have been optimized to work at high output power levels, ranging from 23 to 33 dBm (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006;Mousa, 2013). If these fully integrated PAs are used in applications requiring low level output power such as wireless body sensor networks, the overall efficiency significantly degrades (Tan, et al, 2012).…”

Section: Introductionmentioning

confidence: 99%

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Efficiency Analysis of Low Power Class-E Power Amplifier

Yousefi¹,

Koozehkanani²,

Sobhi³

et al. 2014

MAS

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This paper presents an analysis of effect of inductor and switch losses on output power and efficiency of low power class-E power amplifier. This structure is suitable for integrated circuit implementation. Since on chip inductors have large losses than the other elements, the effect of their losses on efficiency has been investigated. Equations for the efficiency have been derived and plotted versus the value of inductors and switch losses. Derived equations are evaluated using MATLAB. Also, Cadence Spectre has been used for schematic simulation. Results show a fair matching between simulated power loss and efficiency and MATLAB evaluations. Considering the analysis, the proposed power amplifier shows about 13 % improvement in power effiency at 400 MHz and -2 dBm output power. It is simulated in 0.18 μm CMOS technology.

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Section: Circuit Descriptionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Efficiency Analysis of Low Power Class-E Power Amplifier

Yousefi¹,

Koozehkanani²,

Sobhi³

et al. 2014

MAS

View full text Add to dashboard Cite

show abstract

“…This paper organized only the designs [1] process of operating maximum frequency for the dual band ratio of duty cycle 0.5 and the switching frequency of 0.1-10 GHz. Brama suggested that [2][3][4] integrating the high power CMOS process for the parallel circuit of power amplifier it offers low power dissipation it is used in DSP part and that achieves only 30.5dBm of source power and 48% of power added efficiency with the help of balun transceiver for low power integrated CMOS for short range applications off wireless field [5] designing the two class E power amplifier, one should be inverter and the rectifier for achieving high efficiency of the power is denoted in dc/dc converter [6] using the transmission lines designing the class E power amplifier [7] for the low power dc/dc power converter they achieved by 1GHz frequency range [8] by using the shunt capacitance for novel switching frequency operation for high power application for fewer usage the power efficiency is less The reminder of the paper is organized as follows. Section 2 briefly discussed about the power amplifier.…”

Section: Introductionmentioning

confidence: 99%

A1GHz Class E Power Amplifier for Wireless Applications

et.al.¹

2017

IJEEER

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In this paper, a class E power Amplifier (PA) suitable for wireless applications (Wi-Max, cellular phones, cordless phones etc,) is proposed by using the device of RF3931GaN HEMT (Gallium Nitrate High Electron Mobility Transistor).The proposed class E power Amplifier for achieving high output power and increasing gain up to 14.327dB and operates in the frequency range of 1GHz. The designed Power Added Efficiency (PAE) is 64% after optimization and the maximum source power achieved is 32dBw.

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A concise high‐efficiency broadband parallel‐circuit Class‐E power amplifier

Lu,

Jiang,

Zhang

2024

Circuit Theory & Apps

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SummaryAn analysis of a single‐ended high‐efficiency broadband parallel‐circuit (PC) Class‐E power amplifier (PA) with a single reactance compensation technique (RCT) and low‐pass (LP) Chebyshev impedance transformer is first presented under low supply voltage. Analysis of the gate and drain voltage allows to determine the required optimum voltage values for the expected PA design objectives. Derivation and design procedure of the broadband matching network (MN) is provided, which can effectively filter out higher order harmonics and reduce circuit complexity. In addition, the load adaptability for this PA is studied, achieving higher than 67.87% drain efficiency (DE) in the case of load mismatch. A PC Class‐E PA based on NMOS transistor is designed and implemented to validate the analysis over a frequency band of 7–9.4 MHz. Experimental results show that the PA delivers 36.48–38.83 dBm output power with a DE of 84.91% to 86.91%, as well as achieves 83.98% to 86.28% power‐added efficiency (PAE), 19.48–21.83 dB gain with a low supply voltage of 12 V. It is also demonstrated that the experimental results exhibit good agreement with the simulation results, which prototype the radio frequency identification transmitter with broadband high‐efficiency and system compactness. To the author's knowledge, this study represents the first approach to design broadband PC Class‐E PA under low supply voltage for Internet of Things (IoT) applications at HF frequency band, such as electronic article surveillance (EAS) system.

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Analysis and Design of Fully Integrated High-Power Parallel-Circuit Class-E CMOS Power Amplifiers

Cited by 38 publications

References 29 publications

Efficiency Analysis of Low Power Class-E Power Amplifier

Efficiency Analysis of Low Power Class-E Power Amplifier

A1GHz Class E Power Amplifier for Wireless Applications

A concise high‐efficiency broadband parallel‐circuit Class‐E power amplifier

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