“…To determine the optimal intrinsic load for the main amplifier R OPT,M,int and for the peak amplifier R OPT,P,int , the transistors are biased in a deep class AB with V Bias,M/P = −2.9 V. According to the advantages described in [6], an asymmetric drain biasing of V DD,M = 18 V and V DD,P = 28 V is used. The main PA has to Based on these values, the impedance at the device/bias plane is varied to identify the optimum external load Z OPT,ext , which transforms to R OPT,int at the intrinsic node.…”