Analysis and design of a new fault‐tolerant digital comparator based on nano‐scale quantum technology

Abstract

Summary Quantum‐dot cellular automata (QCA) is a transistor‐free technique for designing digital circuits. It is a substitute for CMOS technology for producing low‐energy and high‐speed digital circuits. In addition, the digital comparator is an important digital circuit; its fault‐tolerant design is examined in this article. Additionally, a coplanar QCA‐based fault‐tolerant comparator circuit with a small number of cells is suggested. The QCADesigner is used to achieve exact simulation results. The suggested fault‐tolerant comparator requires 63 QCA cells, uses 0.8 normalμ$$ \upmu $$m2, and has three clock cycles delay in accomplishing its purpose. Furthermore, simulation results demonstrate that the suggested comparator design with a limited number of cells can achieve a fault‐tolerant of 80% against cell missing, extra cell, cell displacement, and cell rotation faults.

Special Issue: Recent advances in quantum computing and quantum neural networks

“…In the article by Jiao, 1 fault tolerance for design of digital comparators is examined. A coplanar quantum‐dot cellular automata (QCA) based fault tolerance comparator is proposed in order to achieve good simulation results.…”