Analog programming of CMOS-compatible Al2O3/TiO2−x memristor at 4.2 K after metal-insulator transition suppression by cryogenic reforming

Abstract

Exploration of memristors' behavior at cryogenic temperatures has become crucial due to the growing interest in quantum computing and cryogenic electronics. In this context, our study focuses on the characterization at cryogenic temperatures (4.2 K) of TiO2−x-based memristors fabricated with a CMOS-compatible etch-back process. We demonstrate a so-called cryogenic reforming (CR) technique performed at 4.2 K to overcome the well-known metal-insulator transition (MIT), which limits the analog behavior of memristors at low temperatures. This cryogenic reforming process was found to be reproducible and led to a durable suppression of the MIT. This process allowed to reduce by ∼20% the voltages required to perform DC resistive switching at 4.2 K. Additionally, conduction mechanism studies of memristors before and after cryogenic reforming from 4.2 to 300 K revealed different behaviors above 100 K, indicating a potential change in the conductive filament stoichiometry. The reformed devices exhibit a conductance level that is 50 times higher than ambient-formed memristor, and the conduction drop between 300 and 4.2 K is 100 times smaller, indicating the effectiveness of the reforming process. More importantly, CR enables analog programming at 4.2 K with typical read voltages allowing to store up to 4 bits of information on a single CR memristor. Suppressing the MIT improved the analog switching dynamics of the memristor leading to ∼250% larger on/off ratios during long-term depression (LTD)/long-term potentiation (LTP) resistance tuning. This enhancement opens up the possibility of using TiO2−x-based memristors to be used as synapses in neuromorphic computing at cryogenic temperatures.

A novel MTCMOS based 8T2M NVSRAM design for low power applications with high temperature endurance

“…This design employs two memristors to store and recover data in SRAM under power-down conditions, thereby enhancing the stability of SRAM during both the read and write operations. We have used W/AlOx/Al2O3/Pt Bilayer resistive switching memristor due to its excellent balance of low power consumption, high endurance, scalability [18], and ease of integration with existing CMOS technology [19]. These memristors are current dependent devices which operate by changing their resistance states in response to voltage, providing nonvolatile storage that retains data without power [20][21][22][23].…”