An ultra-long FFT architecture implemented in a reconfigurable application specified processor

Abstract

This paper presents an efficient architecture for performing 128 points to 1M points Fast Fourier Transformation (FFT) based on mixed radix-2/4/8 butterfly unit. The proposed FFT architecture reduces the computation cost by taking the advantage of the radix-8 FFT algorithm while remaining compatible with sequences whose data length is an integral power of 2. Further optimizations for reconfigurable application specified processor are developed. First, we propose a separated radix-2/4/8 butterfly unit which is more flexible than an entire radix-2/4/8 butterfly unit; second, for the sequences longer than 256K points, an efficient 2-epoch FFT solution is realized. This FFT architecture is implemented in a reconfigurable application specified processor. The computation time of our architecture is 676 us and 14.8 ms for 128K and 1M points FFTs respectively.

A 1 Million-Point FFT on a Single FPGA

“…However, it requires 12 FPGAs (8 for the FFT computations and 4 for control). If we normalize the number of FFT calculations per second by the number of devices, the proposed approach achieves 222 FFTs/Device/s, which is higher than in [5] and [4].…”

“…Fig. 5(b) shows the architecture in [5]. It is a memory-based FFT where the FFT is calculated in 2 epocs.…”

“…By combining the use of radix-2 4 or radix-2 5 and the late placement of the W 1M , there exist three alternative algorithms, which are shown in Fig. 7…”

“…In radio astronomy, large FFTs allow for wide-band high-resolution spectrum analysis [1]- [3] and lead to precise images of all kinds of astronomical objects [4]. In radar, sonar and echo-graphy, large FFTs for pulse compression increase the range resolution and the signal-to-noise ratio [5]. Likewise, large FFT can be used to detect frequency hopping transmissions [6].…”

“…Indeed, current implementations of 1 million-point FFTs use various interconnected fieldprogrammable gate arrays (FPGAs) [4]. The alternatives are to resort to application-specific integrated circuits [5] or, if the application allows for it, the use of a sparse FFT [6] instead of a conventional FFT.…”