J Sign Process Syst
 2020
DOI: 10.1007/s11265-020-01608-0
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An Ultra-Highly Parallel Polynomial Multiplier for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme

Weihang Tan
1
,
Benjamin M. Case
2
,
Gengran Hu
3
et al.
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Cited by 6 publications
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References 23 publications
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Pipelined High-Throughput NTT Architecture for Lattice-Based Cryptography

Tan
1
,
Wang
2
,
Lao
3
et al. 2021
2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)
8
0
1
0
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Pipelined High-Throughput NTT Architecture for Lattice-Based Cryptography

Tan
1
,
Wang
2
,
Lao
3
et al. 2021
2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)
8
0
1
0
View full textAdd to dashboardCite

FastNTT: Design and Evaluation of Modular-Reduction Based Fast NTT Design on FPGA

Gupta,
Kabra,
Zjigyasu
et al. 2023
2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
1
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AC-PM: An Area-Efficient and Configurable Polynomial Multiplier for Lattice Based Cryptography

Hu
1
,
Tian
2
,
Li
3
et al. 2023
IEEE Trans. Circuits Syst. I
12
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1
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