An SHA-3 Hardware Architecture against Failures Based on Hamming Codes and Triple Modular Redundancy

Abstract

Cryptography has become one of the vital disciplines for information technology such as IoT (Internet Of Things), IIoT (Industrial Internet Of Things), I4.0 (Industry 4.0), and automotive applications. Some fundamental characteristics required for these applications are confidentiality, authentication, integrity, and nonrepudiation, which can be achieved using hash functions. A cryptographic hash function that provides a higher level of security is SHA-3. However, in real and modern applications, hardware implementations based on FPGA for hash functions are prone to errors due to noise and radiation since a change in the state of a bit can trigger a completely different hash output than the expected one, due to the avalanche effect or diffusion, meaning that modifying a single bit changes most of the desired bits of the hash; thus, it is vital to detect and correct any error during the algorithm execution. Current hardware solutions mainly seek to detect errors but not correct them (e.g., using parity checking or scrambling). To the best of our knowledge, there are no solutions that detect and correct errors for SHA-3 hardware implementations. This article presents the design and a comparative analysis of four FPGA architectures: two without fault tolerance and two with fault tolerance, which employ Hamming Codes to detect and correct faults for SHA-3 using an Encoder and a Decoder at the step-mapping functions level. Results show that the two hardware architectures with fault tolerance can detect up to a maximum of 120 and 240 errors, respectively, for every run of KECCAK-p, which is considered the worst case. Additionally, the paper provides a comparative analysis of these architectures with other works in the literature in terms of experimental results such as frequency, resources, throughput, and efficiency.

High-Speed Hardware Architecture Based on Error Detection for KECCAK

“…In addition, Table 1 compares the proposed architecture with three similar reported works [ 13 , 14 , 15 , 16 ].…”

“…Alvarado et al [ 16 ] proposed a new error detection and correction approach named re-computing for KECCAK. Table 6 compares our architecture with all versions proposed in [ 16 ].…”

“…More importantly, the introduced errors result in an incorrect KECCAK state, rendering the integrity message output untrustworthy. So far, only a handful of fault detection algorithms have been developed to increase the KECCAK implementation's resilience [10][11][12][13][14][15][16][17][18][19]. Mestiri et al proposed in [10] an effective error detection technique based on modifying the KECCAK architecture.…”

“…More importantly, the introduced errors result in an incorrect KECCAK state, rendering the integrity message output untrustworthy. So far, only a handful of fault detection algorithms have been developed to increase the KECCAK implementation’s resilience [ 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 ].…”

Developing a New Collision-Resistant Hashing Algorithm

“…For instance, scientists Nada E. El-Meligy, Tamer O. Diab and Ashraf S. Mohra described and implemented a number of valuable changes to the standard SHA-512 that they concluded could be employed to enhance the security of the SHA-2 algorithm without losses in performance [1]. In another article that was published recently, Torres-Alvarado et al investigated possible errors in the implementation of the SHA-3 standard and proposed a new architecture that can decrease the probability of failures in the algorithm, which makes it more reliable and also provides better resistance to cryptographic attacks [2]. An important application of the cryptographic hash function that has been actively researched in recent years also includes key generation.…”