An Outphasing Architecture Based on Parallel Radio Frequency–Pulse Width Modulation Method for All-Digital Transmitter

Abstract

For the existing outphasing architectures of an all-digital transmitter (ADTx), the required sampling rate of the signal is too high, which increases the difficulty of digital radio frequency pulse width modulation (RF-PWM) processing. In this paper, we present an outphasing architecture based on the parallel RF-PWM method for an ADTx. Through polyphase interpolation, two baseband outphasing signals are divided into multiple low-rate signals to process simultaneously. The parallel outphasing signals are modulated and encoded to obtain 1-bit parallel signals, which are, respectively, transmitted to multigigabit transceivers (MGTs) to generate two two-level high-speed pulses with different phases. Finally, a three-level high-speed pulse is synthesized and amplified through the switching power amplifier. Through this parallel scheme, the sampling rate of digital RF-PWM signal processing is effectively reduced. Moreover, to explore a pulse encoding method, the outphasing architecture is combined with a zero-crossing comparison through an angle calculation and quadrant judgment, which simplifies the modulation and encoding process. In addition, the impact of the sub-filter order and the number of parallel paths on system performance is analyzed. The simulation results show that for a 16QAM signal with a baseband bandwidth of 20 MHz and a carrier frequency of 200 MHz, the adjacent channel power ratio (ACPR) is below −45 dBc and the error vector magnitude (EVM) is below 1% in the proposed scheme.