Abstract:Boost converters running in valley switching mode have the advantages of low switching loss and small inductor size. However, the switching frequency is not fixed as operating conditions vary, which can make inductor design for this converter challenging. In this paper, a systematic optimization approach is presented that is suitable for wide-input-voltage range designs such as power factor correction (PFC) converters. The loss of each component is modeled as a function of the operating point, and the efficien… Show more
“…4. The converter is topologically simple, requiring only one low-side switch, and a recently proposed optimization approach offers a means to achieve high efficiencies in volume-constrained designs operating at MHz frequencies [17]. An overview of the operation of this converter is provided in Appendix A.…”
Section: Energy Buffer Capacitance Reduction With Active Vs Pasmentioning
confidence: 99%
“…The front-end boost converter is optimized according to the approach detailed in [17]. The resulting converter operates between 0.5-2MHz and the prototype parameters are listed in Table IV. A valuable degree of freedom enabled by the boost frontend is the ability to shape the line current.…”
“…This paper focuses on the trade-offs and potential of the proposed two-stage architecture and uses conversion stages which have been explored in detail in the literature [5], [17], [24]. For convenience, this appendix provides an overview of the operation of the front-and back-end stages.…”
Section: Appendix a Overview Of The Front-and Back-end Stagesmentioning
confidence: 99%
“…2. The miniaturization potential of this active buffer is enabled by the availability of high energy density high-voltage ceramic capacitors [16] and a recently proposed optimization approach for the valley-switched boost converter [17] which takes advantage of the performance benefits of high frequency operation enabled by Gallium Nitride (GaN) devices and modern magnetic materials.…”
Section: Introductionmentioning
confidence: 99%
“…We emphasize that although the VIRT stacked-bridge LLC converter [5] and valley-switched boost converter [17] represent topologies that have been defined in the literature, this study is distinct in its exploration of the net miniaturization benefit that is achievable when using these converters in a twostage charger. Section II elucidates the design considerations involved in selecting the minimum and maximum bus voltage value, and Section III explores the trade-off between an active buffer and a passive buffer.…”
This paper presents the design of a two-stage 50W portable charger architecture with universal ac input and 5V/25W, 9V/45W, 12V/50W output. A 98.5% efficient valleyswitched boost converter operating at 0.5-2MHz enables a 59% reduction in buffer capacitor volume compared to an example electrolytic capacitor while a stacked-bridge LLC converter with a Variable-Inverter-Rectifier-Transformer (VIRT) offers greater than 96% efficiency across the wide output voltage range. The design demonstrates the potential and trade-offs of a two-stage architecture at this operating power and illustrates the benefits of the utilized power stage topologies in achieving both small size and high efficiency over wide input-and output voltage ranges.
“…4. The converter is topologically simple, requiring only one low-side switch, and a recently proposed optimization approach offers a means to achieve high efficiencies in volume-constrained designs operating at MHz frequencies [17]. An overview of the operation of this converter is provided in Appendix A.…”
Section: Energy Buffer Capacitance Reduction With Active Vs Pasmentioning
confidence: 99%
“…The front-end boost converter is optimized according to the approach detailed in [17]. The resulting converter operates between 0.5-2MHz and the prototype parameters are listed in Table IV. A valuable degree of freedom enabled by the boost frontend is the ability to shape the line current.…”
“…This paper focuses on the trade-offs and potential of the proposed two-stage architecture and uses conversion stages which have been explored in detail in the literature [5], [17], [24]. For convenience, this appendix provides an overview of the operation of the front-and back-end stages.…”
Section: Appendix a Overview Of The Front-and Back-end Stagesmentioning
confidence: 99%
“…2. The miniaturization potential of this active buffer is enabled by the availability of high energy density high-voltage ceramic capacitors [16] and a recently proposed optimization approach for the valley-switched boost converter [17] which takes advantage of the performance benefits of high frequency operation enabled by Gallium Nitride (GaN) devices and modern magnetic materials.…”
Section: Introductionmentioning
confidence: 99%
“…We emphasize that although the VIRT stacked-bridge LLC converter [5] and valley-switched boost converter [17] represent topologies that have been defined in the literature, this study is distinct in its exploration of the net miniaturization benefit that is achievable when using these converters in a twostage charger. Section II elucidates the design considerations involved in selecting the minimum and maximum bus voltage value, and Section III explores the trade-off between an active buffer and a passive buffer.…”
This paper presents the design of a two-stage 50W portable charger architecture with universal ac input and 5V/25W, 9V/45W, 12V/50W output. A 98.5% efficient valleyswitched boost converter operating at 0.5-2MHz enables a 59% reduction in buffer capacitor volume compared to an example electrolytic capacitor while a stacked-bridge LLC converter with a Variable-Inverter-Rectifier-Transformer (VIRT) offers greater than 96% efficiency across the wide output voltage range. The design demonstrates the potential and trade-offs of a two-stage architecture at this operating power and illustrates the benefits of the utilized power stage topologies in achieving both small size and high efficiency over wide input-and output voltage ranges.
This paper presents the design of a two-stage 50W portable charger architecture with universal ac input and 5V/25W, 9V/45W, 12V/50W output. A 98.5% efficient valleyswitched boost converter operating at 0.5-2MHz enables a 59% reduction in buffer capacitor volume compared to an example electrolytic capacitor while a stacked-bridge LLC converter with a Variable-Inverter-Rectifier-Transformer (VIRT) offers greater than 96% efficiency across the wide output voltage range. The design demonstrates the potential and trade-offs of a two-stage architecture at this operating power and illustrates the benefits of the utilized power stage topologies in achieving both small size and high efficiency over wide input-and output voltage ranges.
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