2018
DOI: 10.1063/1.5039344
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An open and flexible digital phase-locked loop for optical metrology

Abstract: This paper presents an open and flexible digital phase lock loop optimized for laser stabilization systems. It is implemented on a cheap and easily accessible FPGA-based digital electronics platform (Red Pitaya) running a customizable open-source firmware. A PCbased software interface allows controlling the platform and optimizing the loop parameters remotely. Several tools are included to allow measurement of quantities of interest smoothly and rapidly. To demonstrate the platform's capabilities, we built a f… Show more

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Cited by 44 publications
(20 citation statements)
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References 17 publications
(23 reference statements)
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“…A beamsplitter directed the light to two separate silicon avalanche photodiodes (APD, Thorlabs APD430A and APD210). The electrical signal from the first photodiode was connected to a Red Pitaya field-programmable-gate-array (FPGA) board running the "Frequency comb digitalphase-locked-loop" firmware 33,34 , which was used to feed back to the oscillator pump-diode current in order to stabilize f ceo . The electrical signal for the second APD was connected to a Λ-type frequency counter, which provided an "electrical out-of-loop" confirmation of the f ceo stabilization.…”
Section: Frequency Comb Stabilizationmentioning
confidence: 99%
“…A beamsplitter directed the light to two separate silicon avalanche photodiodes (APD, Thorlabs APD430A and APD210). The electrical signal from the first photodiode was connected to a Red Pitaya field-programmable-gate-array (FPGA) board running the "Frequency comb digitalphase-locked-loop" firmware 33,34 , which was used to feed back to the oscillator pump-diode current in order to stabilize f ceo . The electrical signal for the second APD was connected to a Λ-type frequency counter, which provided an "electrical out-of-loop" confirmation of the f ceo stabilization.…”
Section: Frequency Comb Stabilizationmentioning
confidence: 99%
“…Meanwhile, the hardware circuit of the PLL is usually more complex and costly to design. When the signal is interfered with noise, harmonics, inter-harmonics, and other adverse effects, the accuracy of the PLL circuit is reduced or even the phase-locking is not possible (Tourigny-Plante et al, 2018). And another simple and direct frequency measurement method is composed of a hardware comparator and a counter, as shown in Figure 1A.…”
Section: Introductionmentioning
confidence: 99%
“…This approach has led to numerous novel developments [41]- [47]. Among these approaches, Tourigny-Plante et al use the CORDIC arctan algorithm to digitally extract the signal phase [45]. The phase-locked loop (PLL) is implemented on the same board used in this manuscript, clocked by its internal quartz, using an open-source code available online [48].…”
Section: Introductionmentioning
confidence: 99%