An on-chip power modulator

Wang, Pingshan; Geng, Yaoxiang; Huan, Zhijie; Wang, Haibo; Li, Chaojiang

doi:10.1109/ipmhvc.2010.5958377

Cited by 4 publications

(4 citation statements)

References 22 publications

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“…Additionally, the new approach has the potential for much higher sampling rate provided that short clock signals are generated (e.g. with the CMOS technologies proposed in [24]) and fast switching devices (e.g. the recently available CMOS Schottky diodes as standard device components) are used.…”

Section: Discussionmentioning

confidence: 99%

“…Clock edge sampling [17] and short pulse generation through capacitance differentiation [26] and pulsed power technologies [24] need to be explored for the proposed SHCs in Fig. 1.…”

Section: Discussionmentioning

confidence: 99%

“…1 is about 20 Giga-sample/s. If the pulse duration is further reduced [24], then the sampling rate can be improved.…”

Section: Clock Pulse Generationmentioning

confidence: 99%

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A high-speed sample-and-hold circuit based on CMOS transmission lines

Wang

Gao

et al. 2010

Analog Integr Circ Sig Process

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We introduce the design of a high-speed sample-and-hold circuit (SHC) based on spatial sampling with CMOS transmission lines (TLs). Signal propagation analysis shows that periodically loaded CMOS TLs exhibit filter properties, which cause attenuation and deformation of signal pulses. Nevertheless, the dispersion effects on clock pulse propagation are minimal since clock lines are short, much shorter than the meandered input-signal line. Design considerations on clock pulse generator, sampling switches, and charge amplifiers are presented. Compared with other CMOS approaches, the proposed SHC generates clock pulses on chip and avoids clock jitter difficulties. The SHC is implemented in a 0.13 lm digital CMOS process with standard on-chip coplanar waveguides (CPW) as signal and clock pulse propagation TLs, silicon N-type field effect transistors (NFET) as sampling switches, and high-frequency charge amplifiers for charge amplification. Clock pulse signals of *50 ps width with *17 ps fall edge are generated on-chip. Simulation analysis with Cadence Spectre shows that a sampling rate of 20 Gigasample/s with a 25 dB spurious free dynamic range (SFDR) can be achieved. With shorter clock pulses, both sampling rate and SFDR can be improved in future design.

show abstract

Section: Discussionmentioning

confidence: 99%

“…Clock edge sampling [17] and short pulse generation through capacitance differentiation [26] and pulsed power technologies [24] need to be explored for the proposed SHCs in Fig. 1.…”

Section: Discussionmentioning

confidence: 99%

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A high-speed sample-and-hold circuit based on CMOS transmission lines

Wang

Gao

et al. 2010

Analog Integr Circ Sig Process

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“…As a result, the pulse width can be much shorter than the FO4 delay of the given CMOS technology even though 50 Ω load is involved in circuit. 11 Therefore, this new approach shows great promise in significantly expanding the high-speed operation limits of conventional circuits and systems.…”

Section: Typical Pfl Based Pulse Generator Circuitmentioning

confidence: 99%

Pulse-forming-line based on-chip short pulse generator

Huan¹,

Wang

2015

Review of Scientific Instruments

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A traditional pulse generation circuit based on the pulse-forming-line (PFL) is implemented in a commercial 0.13 μm digital CMOS technology. A meandered on-chip coplanar waveguide is used as the PFL, and CMOS transistor is used as switch in the Cadence Spectre simulation. The circuit sample is fabricated and tested. Pulses of ∼170 ps durations and 120-200 mV amplitudes are obtained when the power supply is tuned from 1.2 V to 2 V. The results show that the traditional PFL based circuit can be implemented in standard CMOS technology for on-chip short pulse generation. Furthermore, the PFL circuits significantly extend the short pulse generation capabilities of CMOS technology.

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On-chip tapered transmission line transformer based on coplanar waveguide

Huan¹,

Wang

2012

The 2012 International Workshop on Microwave and Millimeter Wave Circuits and System Technology

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An on-chip power modulator

Cited by 4 publications

References 22 publications

A high-speed sample-and-hold circuit based on CMOS transmission lines

A high-speed sample-and-hold circuit based on CMOS transmission lines

Pulse-forming-line based on-chip short pulse generator

On-chip tapered transmission line transformer based on coplanar waveguide

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