An offset compensation technique for bandgap voltage reference in CMOS technology

Abstract

Abstract-A precision integrated bandgap voltage reference in 0.35μm CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particular attention was paid to the compensation of the several offsets that could strongly influence the performances of the reference. A very simple sample and hold technique for offset compensation is here presented. The proposed technique is straight forward for all bandgap topologies which use diodes with a terminal connected to the ground node or to the supply node.The temperature coefficient (TC) of the generated output voltage is 12.7ppm/°C versus about 245ppm/°C of the same circuit without offset compensation.A full description and an analytical expression for the proposed compensation technique are given. The results of the most relevant simulations are also reported. The circuit has been inserted in a test chip whose layout is shown.

An offset-insensitive switched-capacitor bandgap reference with continuous output

“…Conventional BJT-based bandgap reference (BGR) [1] , unfortunately, suffers from offset voltage resulting from asymmetry of the amplifier and mismatch between BJTs. This problem can be alleviated by enlarging the area of the amplifier input MOSTs pair [2] or by some trimming circuits [3,4] . These compensation techniques work to some extent, although they increase the circuit complexity and cost.…”