An Iterative Computational Technique for Performance Evaluation of Networks-on-Chip

Abstract

International audienceThe trend toward integrated many-core architectures makes the network-on-chip (NoC) technology, the on-chip communication infrastructure of choice. However, and as opposed to a simple bus, due to its distributed and complex nature in terms of topology, wire size, routing algorithm, and so on, the timing behavior and thus performance of the infrastructure is difficult to predict. Therefore, one of the important phases in the NoC design flow is performance evaluation, which is to extract performance metrics to verify whether a specific instance from the NoC design space satisfies the requirements of the entire system. In this sense, reducing the time to obtain the NoC performance and consequently speeding-up the design space exploration is one of the keys that can considerably reduce the design-flow time and cost. In an effort toward this direction, we propose in this paper a novel analytical performance evaluation method that can be used in the earliest stages of the design flow, before using time-consuming simulations. The analytical method is used to evaluate the performance of a general purpose NoC and we show that it can predict the router latency, end-to-end per-flow latency, and network saturation point with an accuracy comparable to a cycle-accurate simulation. To systematically analyze the accuracy of our method compared to the corresponding simulation model, we present also an innovative accuracy analysis method

Low latency Path Aware XY-X Routing Algorithm for NoC Architectures

“…Rather, the traffic between each pair of nodes follows solitary, predetermined path. As proposed by [3,5,7,[11][12][13][14], non-uniform traffic patterns can induce massive load misbalances in the network and provides less throughput. However, these routing choices can attend least partially because many of these routers happen to be built to optimize another critical facet from a routing-algorithm.…”

“…A routing algorithm is used to direct the data packet from source to the destination, Existing routing algorithms are concentrating on oblivious routing techniques such as Dimension Order Routing (DOR), which route packets to destination irrespective of the load balancing, though these algorithms [5] have less complexity they perform poor communication because of load imbalance. Adaptive routing is a technique to transfer the packet through the less congested path with channel weights for every S-D pair.…”

A General Framework for Average-Case Performance Analysis of Shared Resources

“…Several isolated performance models of such arbiters have been proposed [4][5][6][7][8][9][10][11][12][13], mostly based on queuing theory [5][6][7][8][9][10][11][12]. However, they typically assume that request inter-arrival times and resource service times follow Poisson (exponential) distributions [4-9, 11, 13], which do not cover the dynamic and bursty nature of applications executing through a cache or the behavior of resources with complex timing behavior, such as SDRAMs [14].…”

“…This cyclic dependency between the equations of all queues must be solved either by a fixed-point iterative technique (e.g. in [4], [20] and [21]), or be formulated and solved as a matrix problem (e.g. in [6]).…”

Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems

“…Therefore, a predictive method integrating path diversity and dynamic buffer occupancy information is necessary to achieve traffic-balancing routing algorithm. By following the analysis as in [12], we will show how path diversity and dynamic information can be combined to be a prediction model.…”