An interface-circuit synthesis method with configurable processor core in IP-based SoC designs

Abstract

In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important, however the interface is usually affacted by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores. we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.

Component interconnect and data access interface for embedded vision applications

“…Several works have focused on generating hardware/software interfaces [11,12,15,22]; other have provided BUS interconnect mechanism such as Open Core Protocol (OCP) [24], WISHBONE [8], AMBA [4] for integration of customized peripherals. The goal is to convert peripheral interface operations into packets that adhere a bus-specific protocol by inserting wrappers in the peripheral.…”