In this paper a circuit at the register transfer level will be denoted as an R T L circuit. The paper describes a method for extracting the R T L circuit structure from the circuit formal description, the I-path concept is used. The way of representing the RTL circuit structure by a labelled directed graph where nodes represent components and arcs represent connections between them is presented. Labels identifying the component type are attached t o nodes, other labels are also attached t o arcs t o identify attributes of connections. It is shown, how the graph theory algorifhms can be used t o derive the information about the accessibility of carcuit components, a. e. the existence of I-paths between them, and the sequences of control and clock signals which must be generated t o transfer the information along the existing I-paths.