An instruction-level methodology for power estimation and optimization of embedded VLIW cores

Bona, A.; Sami, M.; Sciuto, D.; Silvano, Cristina; Zaccaria, Vittorio; Zafalon, R.

doi:10.1109/date.2002.998484

Cited by 3 publications

(3 citation statements)

References 2 publications

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“…It is important to emphasize that such an evaluation is specific to the AT89S8252 microcontroller, different devices and families possibly displaying very distinct instruction power characteristics. This argument is supported by comparing works such as [12], [4] and [3].…”

Section: Instructions Power Characterizationmentioning

confidence: 86%

“…An Application for Automatic Power-Characterization (AAPC) was developed, covering: target microcontroller code download, data capture and database generation. For 8051 architecture, a set of 589 characterization instruction-codes 4 were written. Each instruction-code represents an instruction in a specific situation concerning operands.…”

Section: Instructions Power Characterizationmentioning

confidence: 99%

See 1 more Smart Citation

Analyzing Software Performance and Energy Consumption of Embedded Systems by Probabilistic Modeling: An Approach Based on Coloured Petri Nets

Meuse

Neto

Maciel

et al. 2006

Petri Nets and Other Models of Concurrency - ICATPN 2006

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This paper presents an approach for analyzing embedded systems' software energy consumption and performance based on probabilistic modeling. Such an approach applies Coloured Petri Net modeling language (CPN) for supporting simulation and analysis. The proposed approach offers three basic contributions for embedded system analysis field:(i)code modeling, a probabilistic model for scenarios exploration being presented, (ii) formalism, a formal and widespread modeling language (CPN) being applied, with previously validated engines and algorithms for simulation;(iii) flexibility, the proposed approach enabling modeling of different micro-controllers at different abstraction levels.

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Section: Instructions Power Characterizationmentioning

confidence: 86%

Section: Instructions Power Characterizationmentioning

confidence: 99%

Analyzing Software Performance and Energy Consumption of Embedded Systems by Probabilistic Modeling: An Approach Based on Coloured Petri Nets

Meuse

Neto

Maciel

et al. 2006

Petri Nets and Other Models of Concurrency - ICATPN 2006

View full text Add to dashboard Cite

show abstract

“…Operation shuffling for instruction clusters has been studied only in the recent past [Bona et al 2002a[Bona et al , 2002b. Similar to the work presented in this article, their objective is an overall hardware/software energy reduction for embedded VLIW processors.…”

Section: Related Workmentioning

confidence: 88%

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors

Kobayashi

Jayapala

Raghavan

et al. 2007

ACM Trans. Des. Autom. Electron. Syst.

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Clustering L0 buffers is effective for energy reduction in the instruction memory hierarchy of embedded VLIW processors. However, the efficiency of the clustering depends on the schedule of the target application. Especially in heterogeneous or data clustered VLIW processors, determining energy efficient scheduling is more constraining.This article proposes a realistic technique supported by a tool flow to explore operation shuffling for improving generation of L0 clusters. The tool flow explores assignment of operations for each cycle and generates various schedules. This approach makes it possible to reduce energy consumption for various processor architectures. However, the computational complexity is large because of the huge exploration space. Therefore, some heuristics are also developed, which reduce the size of the exploration space while the solution quality remains reasonable. Furthermore, we also propose a technique to support VLIW processors with multiple data clusters, which is essential to apply the methodology to real world processors.The experimental results indicate potential gains of up to 27.6% in energy in L0 buffers, through operation shuffling for heterogeneous processor architectures as well as a homogeneous This work is supported by JSPS Grant-in-Aid for JSPS Fellows #17.9887. Based on Kobayashi, Y., Jayapala, M., Raghavan, P., Catthoor, F., and Imai, M. Operation shuffling for low energy L0 cluster generation on heterogeneous VLIW processors.

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L0 Cluster Synthesis and Operation Shuffling

Jayapala

Barat

et al. 2004

Lecture Notes in Computer Science

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An instruction-level methodology for power estimation and optimization of embedded VLIW cores

Cited by 3 publications

References 2 publications

Analyzing Software Performance and Energy Consumption of Embedded Systems by Probabilistic Modeling: An Approach Based on Coloured Petri Nets

Analyzing Software Performance and Energy Consumption of Embedded Systems by Probabilistic Modeling: An Approach Based on Coloured Petri Nets

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors

L0 Cluster Synthesis and Operation Shuffling

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