Abstrac tA high bandwidth, lo w power consumption, low noise front-end amp lifier is designed based on standard 0.18u m SiGe BiCM OS process. This front-end amplifier consists of a high performance differential RGC TIA, a 3 stage post amplifier and a buffer. The single stage of post amp lifier is Cherry-Hooper amplifier. The entire circu it is simulated by a co mmercial software Cadence. The bandwidth and the differential t ransimpedence of the front-end amplifier are 13.22GHz and 87.3dBΩ with the input-referred rms noise current 1.71μA and the power consumption 38.6mW.