An Improved Investigation into the Effects of the Temperature-Dependent Parasitic Elements on the Losses of SiC MOSFETs

Zeng, Yinong; Yi, Yingping; Liu, Pu

doi:10.3390/app10207192

Cited by 3 publications

(2 citation statements)

References 33 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The existence of the parasitic inductance L S between S Kelvin and S is naturally caused by internal connections of the SiC MOSFET. Dependence of the temperature for the value of L S is very limited, and it decreases slightly with rising temperature [18]; hence, temperature fluctuations can be omitted when considering this method. From (1), it can be considered that the value of V Ls is proportional to the value of L S and di D /dt.…”

Section: The Active Gate Drivermentioning

confidence: 99%

Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

et al. 2021

View full text Add to dashboard Cite

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. Moreover, an adequate manipulation of the gate voltage is necessary as the gate current should be reduced during the rise of the drain current to avoid overshoots and oscillations. The gate voltage is switched at the right moments on the basis of the feedback signal provided from a measurement of the voltage across the parasitic source inductance of the module. This approach simplifies the circuit and provides no additional power losses in the measuring circuit. The paper contains the theoretical background and detailed description of the active gate driver design. The model of the parasitic-based active gate driver was verified using the double-pulse procedure both in Saber simulations and laboratory experiments. The active gate driver decreases the turn-on energy of a 1.7 kV/325 A SiC MOSFET by 7% comparing to a conventional gate driver (VDS = 900 V, ID = 270 A, RG = 20 Ω). Furthermore, the proposed active gate driver lowered the turn-on cycle time from 478 to 390 ns without any serious oscillations in the main circuit.

show abstract

Section: The Active Gate Drivermentioning

confidence: 99%

Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

et al. 2021

View full text Add to dashboard Cite

show abstract

“…While the PEEC method is a stand-alone numerical technique, the equivalent-circuit-based modeling tools employ several numerical techniques to derive equivalent circuits of layout parasitics. For example, the QS EM simulation tool, ANSYS Q3D, employs the FEM and the Method-of-Moments (MoM), and hence, it is related in the literature to both 3D-PEEC method [9,10] and Finite Element Analysis [11,12]. The Q3D derives equivalent circuits of layout parasitics in a form of R-L-C-G lumped elements, where R-L and C-G are calculated by decoupling the electric and magnetic field components in the Maxwell's equations.…”

Section: Introductionmentioning

confidence: 99%

Broadband Circuit-Oriented Electromagnetic Modeling for Power Electronics: 3-D PEEC Solver vs. RLCG-Solver

Kovacevic-Badstuebner

Romano

Antonini

et al. 2021

Energies

View full text Add to dashboard Cite

Broadband electromagnetic (EM) modeling increases in importance for virtual prototyping of advanced power electronics systems (PES), enabling a more accurate prediction of fast switching converter operation and its impact on energy conversion efficiency and EM interference. With the aim to predict and reduce an adverse impact of parasitics on the dynamic performance of fast switching power semiconductor devices, the circuit-oriented EM modeling based on the extraction of equivalent lumped R-L-C-G circuits is frequently selected over the Finite Element Method (FEM)-based EM modeling, mainly due to its lower computational complexity. With requirements for more accurate virtual prototyping of fast-switching PES, the modeling accuracy of the equivalent-RLCG-circuit-based EM modeling has to be re-evaluated. In the literature, the equivalent-RLCG-circuit-based EM techniques are frequently misinterpreted as the quasi-static (QS) 3-D Partial Element Equivalent Circuit (PEEC) method, and the observed inaccuracies of modeling HF effects are attributed to the QS field assumption. This paper presents a comprehensive analysis on the differences between the QS 3-D PEEC-based and the equivalent-RLCG-circuit-based EM modeling for simulating the dynamics of fast switching power devices. Using two modeling examples of fast switching power MOSFETs, a 3-D PEEC solver developed in-house and the well-known equivalent-RLCG-circuit-based EM modeling tool, ANSYS Q3D, are compared to the full-wave 3-D FEM-based EM tool, ANSYS HFSS. It is shown that the QS 3-D PEEC method can model the fast switching transients more accurately than Q3D. Accordingly, the accuracy of equivalent-RLCG-circuit-based modeling approaches in the HF range is rather related to the approximations made on modeling electric-field induced effects than to the QS field assumption.

show abstract

Modeling Analysis and Simulation of SiC MOSFET Considering Temperature Effects

Zhang,

Meng

2023

2023 3rd International Conference on Electronic Information Engineering and Computer (EIECT)

View full text Add to dashboard Cite

An Improved Investigation into the Effects of the Temperature-Dependent Parasitic Elements on the Losses of SiC MOSFETs

Cited by 3 publications

References 33 publications

Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

Broadband Circuit-Oriented Electromagnetic Modeling for Power Electronics: 3-D PEEC Solver vs. RLCG-Solver

Modeling Analysis and Simulation of SiC MOSFET Considering Temperature Effects

Contact Info

Product

Resources

About