An improved DIM interface algorithm for the MMC-HVDC power hardware-in-the-loop simulation system

Hardware-in-the-Loop Assessment Methods

“…The time delay presented in HIL simulations directly affects the phase relationship of the signals exchanged at the point of common coupling and accordingly the power factor of the HUT seen by the simulation platform [3,6,14]. Furthermore, this effect will not only be present at the fundamental frequency but also at any harmonic component present in the simulation, hence the time delay in these harmonic components should also be reduced or compensated.…”

“…This approach is susceptible of amplifying high frequency noise and can be limited when harmonic components are present or the system under test is complex. • Direct-quadrature-zero (dq0) transformation: different harmonic components can be identified with the dq0 transformation, which can be independently compensated with the addition of the time delay to the inverse dq0 transformation [6]. However, this approach relies in noise free and balanced three phase waveforms and can be computationally expensive if large number of harmonics are required.…”

Modelling of the Power Interface of the Digital-Physical Hybrid Simulation System of a VSC-HVDC Based on Virtual Resistance Compensation

“…Obviously, this method has hardly any chance to be put into practice due to the fact that the involved possible additions and/or modifications of the main-circuit elements and the operation modes of the physical subsystem, just for the purpose of improving the stability of the DPHS system, are unacceptable. The scheme proposed in Reference [16] seems to be an exception in that the DPHS system is decoupled at the system-side of the converter transformer instead of the converter-side, thereby increasing |Z H (s)| and decreasing |Z S (s)| at the same time. However, this way is of a very poor practicability in that the investment and land occupation of the DPHS system are expected to increase dramatically when the converter transformers are implemented physically; (2) redesigning the simulation model in the digital subsystem.…”

Interface algorithm development for PHIL simulations of MMC‐HVDC devices via real‐time impedance matching

“…3 a and b . The calculation method of Thevenin equivalent parameters for the MMC can be obtained from [14–17].…”

“…In a PHIL simulation, the power interface needs to realise the real‐time exchange of actual power and signals between a digital simulation system (DSS) and a hardware under test (HUT). In this process, the distortion and time delay introduced by power amplifiers and other interface equipment will affect the accuracy of simulation, and in severe cases, it will lose stability [5–7]. It is possible to effectively improve the stability and accuracy of the PHIL simulation system by designing a reasonable interface algorithm, which is the research focus in this field.…”